CY7C1386D, CY7C1386F
CY7C1387D, CY7C1387F
Document Number: 38-05545 Rev. *E Page 15 of 30
Identification Register Definitions
Instruction Field CY7C1386D/CY7C1386F
(512K × 36)
CY7C1387D/CY7C1387F
(1M × 18) Description
Revision Number (31:29) 000 000 Describes the version number
Device Depth (28:24) [13] 01011 01011 Reserved for internal use.
Device Width (23:18) 119-BGA 101110 101110 Defines the memory type and
architecture.
Device Width (23:18) 165-FBGA 000110 000110 Defines the memory type and
architecture.
Cypress Device ID (17:12) 100101 010101 Defines the width and density.
Cypress JEDEC ID Code (11:1) 00000110100 00000110100 Allows unique identification of SRAM
vendor.
ID Register Presence Indicator (0) 1 1 Indicates the presence of an ID
register.
Scan Register Sizes
Register Name Bit Size (x18) Bit Size (x36)
Instruction 3 3
Bypass 1 1
ID 32 32
Boundary Scan Order (119-ball BGA package) 85 85
Boundary Scan Order (165-ball FBGA package) 89 89
Identification Codes
Instruction Code Description
EXTEST 000 Captures IO ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM outputs to High-Z state.
IDCODE 001 Loads the ID register with the ve ndor ID code and places the register between TDI and
TDO. This operation does not affect SRAM operations.
SAMPLE Z 010 Captures IO ring contents. Places the bound ary scan register between TDI and TDO.
Forces all SRAM output drivers to a High-Z state.
RESERVED 011 Do Not Use. This instruction is reserved for future use.
SAMPLE/PRELOA
D
100 Captures IO ring contents. Places the boundary scan register between TDI and TDO.
Does not affect SRAM operation.
RESERVED 101 Do Not Use. This instruction is reserved for future use.
RESERVED 110 Do Not Use. This instruction is reserved for future use.
BYPASS 111 Places the bypass register between TDI and TDO. This operation does not affect SRAM
operations.
Note
13.Bit #24 is 1 in the register definitions for both 2.5V and 3.3V versions of this device.
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