CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F | Cypress instruction

CY7C1386D, CY7C1386F

CY7C1387D, CY7C1387F

Ordering Information (continued)

Not all of the speed, package, and temperature ranges are available. Please contact your local sales representative or visit www.cypress.com for actual products offered.

250	CY7C1386D-250AXC	51-85050	100-pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Pb-Free	Commercial
	CY7C1387D-250AXC

	CY7C1386F-250BGC	51-85115	119-ball Ball Grid Array (14 x 22 x 2.4 mm)

	CY7C1387F-250BGC

	CY7C1386F-250BGXC	51-85115	119-ball Ball Grid Array (14 x 22 x 2.4 mm) Pb-Free

	CY7C1387F-250BGXC

	CY7C1386D-250BZC	51-85180	165-ball Fine-Pitch Ball Grid Array (13 x 15 x 1.4 mm)

	CY7C1387D-250BZC

	CY7C1386D-250BZXC	51-85180	165-ball Fine-Pitch Ball Grid Array (13 x 15 x 1.4 mm) Pb-Free

	CY7C1387D-250BZXC

	CY7C1386D-250AXI	51-85050	100-pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Pb-Free	Industrial

	CY7C1387D-250AXI

	CY7C1386F-250BGI	51-85115	119-ball Ball Grid Array (14 x 22 x 2.4 mm)

	CY7C1387F-250BGI

	CY7C1386F-250BGXI	51-85115	119-ball Ball Grid Array (14 x 22 x 2.4 mm) Pb-Free

	CY7C1387F-250BGXI

	CY7C1386D-250BZI	51-85180	165-ball Fine-Pitch Ball Grid Array (13 x 15 x 1.4 mm)

	CY7C1387D-250BZI

	CY7C1386D-250BZXI	51-85180	165-ball Fine-Pitch Ball Grid Array (13 x 15 x 1.4 mm) Pb-Free

	CY7C1387D-250BZXI

Document Number: 38-05545 Rev. *E

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Cypress manual CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F

Contents

250 MHz 200 MHz 167 MHz Unit FeaturesSelection Guide Cypress Semiconductor Corporation Logic Block Diagram CY7C1386D/CY7C1386F 3 512K x Logic Block Diagram CY7C1387D/CY7C1387F 3 1M x CY7C1387D 1M x Pin Configurations Pin Tqfp Pinout 3 Chip EnablesCY7C1386D 512K X Pin Configurations Ball BGA Pinout 1 Chip Enable Pin Configurations Ball Fbga Pinout 3 Chip Enable Name Description Power supply inputs to the core of the devicePin Definitions Byte write select inputs, active LOW. Qualified with Functional Overview ZZ Mode Electrical Characteristics Interleaved Burst Address Table Mode = Floating or VDDLinear Burst Address Table Mode = GND Operation Add. Used Function CY7C1387D/CY7C1387F Truth Table for Read/Write 6Function CY7C1386D/CY7C1386F TAP Controller State Diagram TAP Controller Block Diagram Bypass Register TAP Instruction Set TAP AC Switching Characteristics TAP Timing 3V TAP AC Output Load Equivalent 3V TAP AC Test Conditions5V TAP AC Test Conditions GND VIN Vddq Identification Codes Identification Register DefinitionsScan Register Sizes Register Name Bit Size Internal Ball BGA Boundary Scan Order 14Bit # Ball ID M10 A10 B10M11 G10 F10 Internal Operating Range Electrical CharacteristicsMaximum Ratings Range Ambient AC Test Loads and Waveforms CapacitanceThermal Resistance Switching Characteristics Over the Operating Range 20 Description 250 200 167 Unit Parameter Min Switching Waveforms Read Cycle Timing Write Cycle Timing 26 Adsc Read/Write Cycle Timing 26, 28 ZZ Mode Timing 30 Ordering Information CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Package Diagrams Pin Thin Plastic Quad Flat pack 14 x 20 x 1.4 mm Ball BGA 14 x 22 x 2.4 mm Ball Fbga 13 x 15 x 1.4 mm Document Number Issue Date Orig. Description of ChangeDocument History