ROUTA1 ± ROUTA2 ±, TOUTB1 ± TOUTB2 ±

CYV15G0104TRB

The CYV15G0104TRB is ideal for SMPTE applications where different data rates and serial interface standards are necessary for each channel. Some applications include multi-

format routers, switchers, format converters, SDI monitors, cameras, and camera control units.

CYV15G0104TRB Serializer and Reclocking Deserializer Logic Block Diagram

RXDA[9:0]	TRGCLKA±	TXDB[9:0]	REFCLKB±
x10		x10
		Phase
Deserializer		Align
Deserializer		Buffer
		Serializer
Reclocker	RX	TX

ROUTA1± ROUTA2±

INA1± INA2±

TOUTB1± TOUTB2±

Document #: 38-02100 Rev. *B

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Cypress CYV15G0104TRB manual ROUTA1 ± ROUTA2 ±, TOUTB1 ± TOUTB2 ±

Contents

Receive RX channel of the CYV15G0104TRB HOTLink FeaturesFunctional Description North First Street San Jose, CA Document # 38-02100 Rev. *B ROUTA1 ± ROUTA2 ± TOUTB1 ± TOUTB2 ± Device Configuration and Control Block Diagram Reclocking Deserializer Path Block DiagramSerializer Path Block Diagram Jtag Pin Configuration Top View1 Pin Configuration Bottom View1 20 19 18 17 16 Transmit Path Clock Signals Receive Path Data and Status Signals Device Control Signals Name Characteristics Signal DescriptionReceive Path Clock Signals Signal Detect Amplitude Select Device Configuration and Control Bus SignalsInternal Device Configuration Latches Receive Channel Power Control CYV15G0104TRB HOTLink II Operation CYV15G0104TRB Transmit Data Path Spdselb Txrateb CYV15G0104TRB Receive Data PathREFCLKB± Sdasela Signal Detect/Link FaultClock/Data Recovery TRGCLKA± Reclocker Serial Output Drivers Power ControlReclocker Output Bus Latch Types Device Configuration and Control InterfaceDevice Reset State Static Latch Values Reset sampled LOW disables all output drivers Disables all output driversTransmit Bist function is enabled Phase Alignment Buffer Document # 38-02100 Rev. *B BISTSTA, RXDA0, RXDA1 Jtag SupportJtag ID Bistdatacompare 000 BisterrorBiststart BISTSTA, RXDA0, RXDA1 = Bistwait Bistlastbad Operating Range CYV15G0104TRB DC Electrical CharacteristicsMaximum Ratings CYV15G0104TRB AC Electrical Characteristics AC Test Loads and Waveforms Txrateb = 1, Txckselb = Parameter Description Min Max UnitTxrateb = 0, Txckselb = TXRATEB= 0, Txckselb = PLL Characteristics CYV15G0104TRB Reclocker Output PLL Characteristics Parameter Description Test Conditions Max Unit CYV15G0104TRB HOTLink II Transmitter Switching WaveformsCapacitance Transmit Interface Write Timing Txclkb selected Rxratea = Txrate =Txrateb = Bus Configuration Write Timing No Connect VCC PowerReset Lvttl in PU GND Ground RXCLKA+ Lvttl OUT TXDB2 LvttlTXDB9 Lvttl Repdoa Lvttl OUT Speed Ordering Code Package DiagramOrdering Information Package Type Operating Name Range FRE REV ECN no Issue ORIG. Description of Change DateDocument History SUA