Document History, Fre, Sua, Agt | Cypress CYV15G0104TRB specification

CYV15G0104TRB

Document History Page

Document Title: CYV15G0104TRB Independent Clock HOTLink II™ Serializer and Reclocking Deserializer

Document Number: 38-02100

REV.	ECN NO.	ISSUE	ORIG. OF	DESCRIPTION OF CHANGE
REV.	ECN NO.	DATE	CHANGE	DESCRIPTION OF CHANGE
**	244348	See ECN	FRE	New Data Sheet
*A	338721	See ECN	SUA	Added Pb-Free package option availability
*B	384307	See ECN	AGT	Revised setup and hold times (tTXDH, tTREFDS, tTREFDH, tRXDv–, tRXDv+)

Document #: 38-02100 Rev. *B

Page 27 of 27

[+] Feedback

Page 27

Image 27

Cypress CYV15G0104TRB manual Document History, REV ECN no Issue ORIG. Description of Change Date, Fre, Sua, Agt

Contents

North First Street San Jose, CA Document # 38-02100 Rev. *B FeaturesFunctional Description Receive RX channel of the CYV15G0104TRB HOTLink TOUTB1 ± TOUTB2 ± ROUTA1 ± ROUTA2 ± Jtag Reclocking Deserializer Path Block DiagramSerializer Path Block Diagram Device Configuration and Control Block Diagram Pin Configuration Top View1 20 19 18 17 16 Pin Configuration Bottom View1 Receive Path Data and Status Signals Transmit Path Clock Signals Name Characteristics Signal Description Receive Path Clock SignalsDevice Control Signals Receive Channel Power Control Device Configuration and Control Bus SignalsInternal Device Configuration Latches Signal Detect Amplitude Select CYV15G0104TRB Transmit Data Path CYV15G0104TRB HOTLink II Operation CYV15G0104TRB Receive Data Path REFCLKB±Spdselb Txrateb TRGCLKA± Signal Detect/Link FaultClock/Data Recovery Sdasela Output Bus Power ControlReclocker Reclocker Serial Output Drivers Static Latch Values Device Configuration and Control InterfaceDevice Reset State Latch Types Phase Alignment Buffer Document # 38-02100 Rev. *B Disables all output driversTransmit Bist function is enabled Reset sampled LOW disables all output drivers Jtag Support Jtag IDBISTSTA, RXDA0, RXDA1 Bistlastbad BisterrorBiststart BISTSTA, RXDA0, RXDA1 = Bistwait Bistdatacompare 000 CYV15G0104TRB DC Electrical Characteristics Maximum RatingsOperating Range AC Test Loads and Waveforms CYV15G0104TRB AC Electrical Characteristics TXRATEB= 0, Txckselb = Parameter Description Min Max UnitTxrateb = 0, Txckselb = Txrateb = 1, Txckselb = CYV15G0104TRB Reclocker Output PLL Characteristics PLL Characteristics Transmit Interface Write Timing Txclkb selected CYV15G0104TRB HOTLink II Transmitter Switching WaveformsCapacitance Parameter Description Test Conditions Max Unit Txrate = Txrateb =Rxratea = Bus Configuration Write Timing GND Ground VCC PowerReset Lvttl in PU No Connect Repdoa Lvttl OUT TXDB2 LvttlTXDB9 Lvttl RXCLKA+ Lvttl OUT Package Type Operating Name Range Package DiagramOrdering Information Speed Ordering Code SUA REV ECN no Issue ORIG. Description of Change DateDocument History FRE

Cypress CYV15G0104TRB Document History, REV ECN no Issue ORIG. Description of Change Date, Fre

Models: CYV15G0104TRB

Document History Page

REV.

ECN NO.

ISSUE

ORIG. OF

DESCRIPTION OF CHANGE

DATE

FRE

SUA

AGT