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Eurotech Appliances PXA255 Detailed hardware description, VIPER block diagram, VIPER

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VIPER Technical Manual	Detailed hardware description

Detailed hardware description

The following section provides a detailed description of the functions provided by the VIPER. This information may be required during development after you have started adding extra peripherals or are starting to use some of the embedded features.

VIPER block diagram

The diagram below illustrates the functional organization of the VIPER PC/104 SBC. Functions that are not available with the standard VIPER-Lite are highlighted in orange.

VIPER

			I2C
			COM 1
		COM 2&3				RS232
	PL4		COM 4			Transceivers
	PL4
		COM5	JP1			RS422/485
			JP1			Transceiver
						Transceiver
	PL1	10/100
	PL1	baseTX
	&	baseTX		Transformer
	&			Transformer
	PL2
						Serial
						EEPROM
	PL17				USB Client
	PL17
		5V			USB Power
	PL7				Switch
	PL7				USB1 & 2
					USB1 & 2
	Optional 3V
						Backup
	PL8		TPM			GPIO[26:27]
						GPIO[26:27]
	PL9			IN[0:7] / OUT[0:7]
	PL9
		5V
			PC/104 Address & Data

14.318MHz							1.8432MHz
14.318MHz							6MHz

Clock

8MHz

Generation

14.318MHz

24.576MHz

25MHz

Control

3.6864MHz

33MHz

DUART

3V

Backup

RTC

32.768kHz

LAN91C111

Control

Power

AMP R+L

Amp

64MB

PL6

SDRAM

AC'97

LINE IN R+L

LINE OUT R+L

Signals

AC'97

MIC IN

1MB

Codec

Bootloader

FLASH

&Address

LCD Signals

16 or 32MB

3.3V

5V

Silicon

Data

JP2

Disk

BLKEN &

LCD_Supply

Dual

BLKSAFE &

USB Host

LCDEN

LCDSAFE

PL3

Control

MOSFET

Controller

PXA255

LCDEN

3V

POSBIAS /

Backup

PWM1

Reg

NEGBIAS

256kB

SRAM

Jumper Configuration

JP3

JTAG

Transceivers

Control

PL10

CR2032

INT_VBAT_IN

JP4

3V

Backup

PL11

&

PL12

PC/104 Control

	Transceivers	Voltage	EXT_VBAT_IN
	& CF	Monitor	EXT_VBAT_IN
		Monitor
		3.3V	PL16
		1.06-1.29V	PL16

PC/104 Interrupts

CF Address & Data

CF Control

PL5

3.3V

CPLD	PC/104		Triple Reg	5V
CPLD	PC/104	3.3V	Triple Reg
	Control
Transceivers	Signals	Control	Micropower
Transceivers	Signals		DAC
CF Power	CF_SWITCH	1.8V	Reg
CF Power	CF_SWITCH
Switch
Switch

© 2007 Eurotech Ltd Issue E

18

Contents

VIPER / VIPER-Lite Technical Manual VIPER Technical Manual Contents Getting started Detailed hardware description VIPER address map Translations made by the MMU Introduction VIPER ‘at a glance’ VIPER-Lite‘at a glance’ VIPER features Network support Trusted Platform Module (TPM) [optional] Real time clock (RTC) Watchdog General purpose I/O (GPIO) VIPER support products •CYCLOPS •VIPER-ICE(Industrial Compact Enclosure) development kits Development kits available for the VIPER Windows CE/CE 5.0 development kit Embedded Linux development kit Wind River VxWorks 5.5 development kit Entry level development kits for VIPER or VIPER-Lite Windows CE / CE 5.0 development kit •Embedded Linux development kit Product handling and environmental compliance Conventions Tables Byte lane Getting started Using the VIPER Using the audio features Using the USB host Using the USB client Using the Ethernet interface Using the PC/104 expansion bus Detailed hardware description VIPER block diagram VIPER address map Translations made by the MMU PXA255 processor PXA255 GPIO pin assignments Page Page NoAF Signal name Active Sleep Function See section… Real time clock Watchdog timer Memory Static RAM Least Significant Byte CompactFLASH Region name Interrupt configuration and reset register [ICR] ICR Bit Functions Name Interrupt assignments PC/104 interrupt register [PC104I1] PC/104 interrupt register [PC104I2] (not available under Windows CE) Value Function PC/104 interrupts under embedded Linux and VxWorks PC/104 interrupts under Windows CE Flat panel display support TFT panel data bit mapping to the VIPER Panel data bus bit 18-bitTFT 12-bitTFT 9-bitTFT STN panel data bit mapping to the VIPER Dual scan colour STN Dual scan mono STN VIPER Active display signal (TFT) LCD backlight enable LCD logic supply enable LCD backlight brightness control STN BIAS voltage VIPER-FPIF1details Connector Function VIPER-FPIF1connectors LK1 – TFT clock delay selection PL1 – VIPER LCD cable connector Pin PL2 – Generic LCD connector PL3 – Direct connection to a NEC NL3224BC35-205.5inch 320x240 TFT display PL4 – Backlight inverter connector Pin Signal name PL5 – STN Bias connector FPIF-LVDS-TXdetails Connector FPIF-LVDS-TXconnectors JP1 – TX strobe selection JP2 – Cable power selection JP3 – MSL selection J1 – VIPER LCD cable connector J2 – LVDS Hirose connector J3 – LVDS MDR connector FPIF-LVDS-RXdetails FPIF-LVDS-RXconnectors JP1 – LCD power selection JP2 – Backlight power selection Page Page As viewed from the connector pins FPIF-CRTdetails FPIF-CRTconnectors J2 – CRT connector Audio General purpose I/O VIPER outputs PXA255 GPIO Register Address VIPER-I/O USB host interface USB client interface 10/100BaseTX Ethernet Ethernet signal mapping between VIPER and Ethernet breakout connectors Ethernet breakout PL3 RJ45 Ethernet LED signal mapping between VIPER and Ethernet breakout connectors Ethernet breakout PL2 – Serial COMs ports COM4 – RS232 interface COM5 – RS422/485 interface RS422 RS485 Typical RS422 and RS485 connection PC/104 interface VIPER PC/104 interface details PC/104 8-bitI/O read/write access cycles PC/104 16-bitI/O read/write access cycles PC/104 8-bitmemory write access cycle PC/104 16-bitmemory read/write access cycles Unsupported PC/104 interface features TPM JTAG and debug access Power and power management Power supplies Power management Processor current estimations Current saving from 5V when processor core is in performance mode Vcore (V) Asleep Current saving from 5V when processor core is in power saving mode Power savings Power saving mode Performance mode CPU Audio External peripheral device power estimations Device Part number Condition Power estimate examples Example 2: VIPER [Linux] at 200MHz in performance mode + LCD with backlight on Page Processor power management DAC Data Hex value CPU core voltage Comment LTC1659 DAC pin function Interrupt configuration and reset register ICR bit functions UART power management GPIO12 Operation status Transmitters Receivers Audio power management TPM Wake up events SourceGPIO Connectors, LEDs and jumpers Connectors PL1 – 10/100BaseTX Ethernet connector PL2 – Ethernet status LEDs connector As viewed from the connector pins COM5 COM3 COM2 COM4 COM1 PL5 – CompactFLASH connector PL6 – Audio connector PL7 – USB connector PL8 – TPM Tamper detect connector (optional) PL9 – GPIO connector PL10 – JTAG connector PL11 & PL12 – PC/104 connectors PL12 PL11 Row D Row C PL16 – Power connector PL17 – USB client connector 2011-1x2GSB/SN Status LEDs Jumpers RS485/422 configuration – LK4, LK5, LK6 and LK7 on JP1 LK4 Description LK5 Description LK6 & LK7 Description LCD supply voltage – LK8 on JP2 LK8 Description Battery jumper – LK9 on JP4 LK9 Description Appendix A – Contacting Eurotech Eurotech sales Eurotech technical support Eurotech Group Appendix B – Specification Appendix C – Mechanical diagram Appendix D – Reference information National Semiconductor Corporation Koninklijke Philips Electronics N.V Maxim Integrated Products Inc Linear Technology Corporation Appendix E – Acronyms and abbreviations Page Appendix F – RoHS-6Compliance - Materials Declaration Form Confirmation of Environmental Compatibility for Supplied Products Index