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Eurotech Appliances PXA255 VIPER address map, CS5, CS5, CS5, CS5, CS5, CS5, CS5, CS4, CS3, CS2, CS1, CS0, width, SDCS0, PXA255, 32-bit, 32-bit, 32-bit, 32-bit, 32-bit, 16-bit, 16-bit

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VIPER Technical Manual	Detailed hardware description

VIPER address map

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PXA255			Bus/register	Description
chip selectPhysical address			width	Description
-	0xA4000000 – 0xFFFFFFFF		-	Reserved
SDCS0	0xA0000000 – 0xA3FFFFFC		32-bit	SDRAM, IC2&3
-	0x4C000000 – 0x9FFFFFFF		-	Reserved
NA	0x48000000	– 0x4BFFFFFF	32-bit	Memory Control Registers1
NA	0x44000000	– 0x47FFFFFF	32-bit	LCD Control Registers1
NA	0x40000000	– 0x43FFFFFF	32-bit	PXA255 Peripherals1
-	0x3C200400 – 0x3FFFFFFF		-	Reserved
NA	0x3C000000 – 0x3C1FFFFF		8/16-bit	PC/104 Memory Space
-	0x30000400	– 0x3BFFFFFF	-	Reserved
NA	0x30000000	– 0x300003FF	8/16-bit	PC/104 I/O Space
NA	0x20000000	– 0x2FFFFFFF	32-bit	CompactFLASH, PL5

-	0x14880000	– 0x1FFFFFFF	-	Reserved
CS5	0x14800000	– 0x1487FFFF	16-bit	SRAM (see page 28 73H)
-	0x14500002	– 0x47FFFFFF	-	Reserved
CS5	0x14500000	– 0x14500001	16-bit	General purpose I/O (see page
				57 274H)
-	0x14300020	– 0x144FFFFF	-	Reserved
CS5	0x14300010	– 0x1430001F	16-bit	COM4 (see page 65 275H)
CS5	0x14300000	– 0x1430000F	16-bit	COM5 (see page 65 27 H)
-	0x14100006	– 0x142FFFFF	-	Reserved
CS5	0x14100004	– 0x14100005	16-bit	PC104I2 Register (see page 31 277H)
CS5	0x14100002	– 0x14100003	16-bit	ICR Register (see page 31 278H)
CS5	0x14100000	– 0x14100001	16-bit	PC104I1 Register (see page 31 279H)
-	0x10000004	– 0x140FFFFF	-	Reserved
CS4	0x10000000	– 0x100007FF	32-bit	Ethernet Data port
-	0x0C000004 – 0x0FFFFFFF		-	Reserved
CS3	0x0C000000 – 0x0C000002		16-bit	USB Host Controller
-	0x08000310	– 0x0BFFFFFF	-	Reserved
CS2	0x08000300	– 0x0800030E	16-bit	Ethernet I/O Space
-	0x06000000	– 0x080002FF	-	Reserved
CS1	0x04000000	– 0x05FFFFFE	16-bit	FLASH Memory / Silicon Disk

-	0x00100000	– 0x03FFFFFF	-	Reserved
CS0	0x00000000	– 0x000FFFFE	16-bit	Bootloader FLASH

1Details of the internal registers are in the Intel Developer Manual on the Development Kit CD.

© 2007 Eurotech Ltd Issue E

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Contents

VIPER / VIPER-Lite Technical Manual VIPER Technical Manual Contents Getting started Detailed hardware description VIPER address map Translations made by the MMU Introduction VIPER ‘at a glance’ VIPER-Lite‘at a glance’ VIPER features Network support Trusted Platform Module (TPM) [optional] Real time clock (RTC) Watchdog General purpose I/O (GPIO) VIPER support products •CYCLOPS •VIPER-ICE(Industrial Compact Enclosure) development kits Development kits available for the VIPER Windows CE/CE 5.0 development kit Embedded Linux development kit Wind River VxWorks 5.5 development kit Entry level development kits for VIPER or VIPER-Lite Windows CE / CE 5.0 development kit •Embedded Linux development kit Product handling and environmental compliance Conventions Tables Byte lane Getting started Using the VIPER Using the audio features Using the USB host Using the USB client Using the Ethernet interface Using the PC/104 expansion bus Detailed hardware description VIPER block diagram VIPER address map Translations made by the MMU PXA255 processor PXA255 GPIO pin assignments Page Page NoAF Signal name Active Sleep Function See section… Real time clock Watchdog timer Memory Static RAM Least Significant Byte CompactFLASH Region name Interrupt configuration and reset register [ICR] ICR Bit Functions Name Interrupt assignments PC/104 interrupt register [PC104I1] PC/104 interrupt register [PC104I2] (not available under Windows CE) Value Function PC/104 interrupts under embedded Linux and VxWorks PC/104 interrupts under Windows CE Flat panel display support TFT panel data bit mapping to the VIPER Panel data bus bit 18-bitTFT 12-bitTFT 9-bitTFT STN panel data bit mapping to the VIPER Dual scan colour STN Dual scan mono STN VIPER Active display signal (TFT) LCD backlight enable LCD logic supply enable LCD backlight brightness control STN BIAS voltage VIPER-FPIF1details Connector Function VIPER-FPIF1connectors LK1 – TFT clock delay selection PL1 – VIPER LCD cable connector Pin PL2 – Generic LCD connector PL3 – Direct connection to a NEC NL3224BC35-205.5inch 320x240 TFT display PL4 – Backlight inverter connector Pin Signal name PL5 – STN Bias connector FPIF-LVDS-TXdetails Connector FPIF-LVDS-TXconnectors JP1 – TX strobe selection JP2 – Cable power selection JP3 – MSL selection J1 – VIPER LCD cable connector J2 – LVDS Hirose connector J3 – LVDS MDR connector FPIF-LVDS-RXdetails FPIF-LVDS-RXconnectors JP1 – LCD power selection JP2 – Backlight power selection Page Page As viewed from the connector pins FPIF-CRTdetails FPIF-CRTconnectors J2 – CRT connector Audio General purpose I/O VIPER outputs PXA255 GPIO Register Address VIPER-I/O USB host interface USB client interface 10/100BaseTX Ethernet Ethernet signal mapping between VIPER and Ethernet breakout connectors Ethernet breakout PL3 RJ45 Ethernet LED signal mapping between VIPER and Ethernet breakout connectors Ethernet breakout PL2 – Serial COMs ports COM4 – RS232 interface COM5 – RS422/485 interface RS422 RS485 Typical RS422 and RS485 connection PC/104 interface VIPER PC/104 interface details PC/104 8-bitI/O read/write access cycles PC/104 16-bitI/O read/write access cycles PC/104 8-bitmemory write access cycle PC/104 16-bitmemory read/write access cycles Unsupported PC/104 interface features TPM JTAG and debug access Power and power management Power supplies Power management Processor current estimations Current saving from 5V when processor core is in performance mode Vcore (V) Asleep Current saving from 5V when processor core is in power saving mode Power savings Power saving mode Performance mode CPU Audio External peripheral device power estimations Device Part number Condition Power estimate examples Example 2: VIPER [Linux] at 200MHz in performance mode + LCD with backlight on Page Processor power management DAC Data Hex value CPU core voltage Comment LTC1659 DAC pin function Interrupt configuration and reset register ICR bit functions UART power management GPIO12 Operation status Transmitters Receivers Audio power management TPM Wake up events SourceGPIO Connectors, LEDs and jumpers Connectors PL1 – 10/100BaseTX Ethernet connector PL2 – Ethernet status LEDs connector As viewed from the connector pins COM5 COM3 COM2 COM4 COM1 PL5 – CompactFLASH connector PL6 – Audio connector PL7 – USB connector PL8 – TPM Tamper detect connector (optional) PL9 – GPIO connector PL10 – JTAG connector PL11 & PL12 – PC/104 connectors PL12 PL11 Row D Row C PL16 – Power connector PL17 – USB client connector 2011-1x2GSB/SN Status LEDs Jumpers RS485/422 configuration – LK4, LK5, LK6 and LK7 on JP1 LK4 Description LK5 Description LK6 & LK7 Description LCD supply voltage – LK8 on JP2 LK8 Description Battery jumper – LK9 on JP4 LK9 Description Appendix A – Contacting Eurotech Eurotech sales Eurotech technical support Eurotech Group Appendix B – Specification Appendix C – Mechanical diagram Appendix D – Reference information National Semiconductor Corporation Koninklijke Philips Electronics N.V Maxim Integrated Products Inc Linear Technology Corporation Appendix E – Acronyms and abbreviations Page Appendix F – RoHS-6Compliance - Materials Declaration Form Confirmation of Environmental Compatibility for Supplied Products Index