VIPER Technical Manual

Detailed hardware description

 

 

PC/104 16-bit memory read/write access cycles

AEN

BALE

SBHE

A<0:23>

MEMCS16

IOCHRDY

(S)MEMR/(S)MEMW

DATA (read)

DATA (write)

VALID

VALID

VALID

VALID

VALID

VALID

Unsupported PC/104 interface features

The PC/104 bus features not supported by the VIPER are as follows:

•PC/104 IRQ9, IRQ14 and IRQ15 are not available under Windows CE as all interrupt sources are fully utilized. Therefore the PC104I2 register is not available.

•DMA is not supported on the VIPER’s PC/104 interface. Therefore AEN is set to a constant logical zero.

•Bus Mastering is not supported on the VIPER’s PC/104 interface. Therefore do not connect another VIPER or any other master add-on board to the VIPER PC/104 interface.

•Shared interrupts are not supported on the VIPER’s PC/104 interface. Therefore do not connect more than one add-on board to the same interrupt signal line.

•BALE is set to a constant logical one as the address is valid over the entire bus cycle.

•The PXA255 PCMCIA memory controller does not support 8-bit memory read accesses for common memory space.

© 2007 Eurotech Ltd Issue E

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