Eurotech Appliances PXA255 PC/104 interrupts under Windows CE

VIPER Technical Manual	Detailed hardware description

PC/104 interrupts under Windows CE

Write 0x2 to the ICR Register so that the first PC/104 interrupt source causes the PXA255 PC/104 interrupt pin GPIO1 to receive a low to high transition. When the first PC/104 interrupt occurs the Interrupt service routine will start polling through the PC/104 interrupt sources in the PC104I1 register. The first bit it sees set to a ‘1’, sets a semaphore to make a program run to service the corresponding interrupt.

Once this program has serviced the interrupt the interrupting source returns its interrupt output to the inactive state (‘0’) if it hasn’t requested another interrupt whilst the microprocessor serviced the last interrupt. Once this happens the corresponding bit in the PC104I1 register shall be automatically cleared. Each PC/104 board requesting an interrupt shall keep its interrupt in the active state (‘1’) until the interrupt has been serviced by the microprocessor. When there are no interrupts outstanding the level of the PC/104 interrupt on GPIO1 shall automatically return to logic ‘0’. If it is still ‘1’ then there are interrupts outstanding, which would have occurred during the servicing of the last interrupt.

To capture any interrupts that could have occurred whilst the last interrupt was serviced, the retrigger interrupt bit in the ICR register is set to ‘1’ to retrigger a low to high transition on GPIO1 to restart the interrupt polling mechanism if there are any outstanding interrupts.

The diagram below explains how the PC/104 interrupt on GPIO1 behaves over time when the ICR AUTO_CLR bit is set to ‘1’:

Highest IRQ3

Priority IRQ4

IRQ5

IRQ6

IRQ7

IRQ10

Lowest IRQ11 Priority IRQ12

GPIO1

Level

1st IRQ received

(IRQ service

routine started)

Time

	1.12µs
2nd IRQ received	1st IRQ serviced	IRQ service	2nd IRQ
whilst last IRQ is	(GPIO1 doesn’t	routine started	serviced (GPIO1
being serviced	go low)		serviced (GPIO1
being serviced	go low)		goes low
	Set RETRIG bit in ICR		because there	Set RETRIG bit in ICR register
	register to ‘1’ to retrigger		are no	to ‘1’ to retrigger interrupt on
	register to ‘1’ to retrigger		outstanding	to ‘1’ to retrigger interrupt on
	interrupt on GPIO1 if there		outstanding	GPIO1 if there are any
	interrupt on GPIO1 if there		interrupts)	GPIO1 if there are any
	are any outstanding		interrupts)	outstanding interrupts
	interrupts

PC/104 IRQ9, IRQ14 and IRQ15 are not available under Windows CE as all interrupt sources are fully utilized; therefore the PC104I2 register is disabled for Windows CE.