Fujitsu MB91401 default, Prelminary, 2004.11.12, Address of TBR, Interrupt source, Offset

Prelminary	MB91401
2004.11.12

	Interrupt number		Interrupt		Address of TBR
Interrupt source				Offset		RN
	Decimal	Hexa-	level		default
		decimal
DMAC3 (end, error)	34	22	ICR18	374H	000FFF74H	
DMAC4 (end, error)	35	23	ICR19	370H	000FFF70H	
System reserved	36	24	ICR20	36CH	000FFF6CH	
System reserved	37	25	ICR21	368H	000FFF68H	
System reserved	38	26	ICR22	364H	000FFF64H	
System reserved	39	27	ICR23	360H	000FFF60H	
System reserved	40	28	ICR24	35CH	000FFF5CH	
System reserved	41	29	ICR25	358H	000FFF58H	
System reserved	42	2A	ICR26	354H	000FFF54H	
System reserved	43	2B	ICR27	350H	000FFF50H	
System reserved	44	2C	ICR28	34CH	000FFF4CH	
U-TIMER0	45	2D	ICR29	348H	000FFF48H	
U-TIMER1	46	2E	ICR30	344H	000FFF44H	
Timebase timer overflow	47	2F	ICR31	340H	000FFF40H	
System reserved	48	30	ICR32	33CH	000FFF3CH	
System reserved	49	31	ICR33	338H	000FFF38H	
System reserved	50	32	ICR34	334H	000FFF34H	
System reserved	51	33	ICR35	330H	000FFF30H	
System reserved	52	34	ICR36	32CH	000FFF2CH	
System reserved	53	35	ICR37	328H	000FFF28H	
System reserved	54	36	ICR38	324H	000FFF24H	
System reserved	55	37	ICR39	320H	000FFF20H	
System reserved	56	38	ICR40	31CH	000FFF1CH	
System reserved	57	39	ICR41	318H	000FFF18H	
System reserved	58	3A	ICR42	314H	000FFF14H	
System reserved	59	3B	ICR43	310H	000FFF10H	
System reserved	60	3C	ICR44	30CH	000FFF0CH	
System reserved	61	3D	ICR45	308H	000FFF08H	
System reserved	62	3E	ICR46	304H	000FFF04H	
Delay interrupt source bit	63	3F	ICR47	300H	000FFF00H	
System reserved (Used by REALOS*)	64	40		2FCH	000FFEFCH	
System reserved (Used by REALOS*)	65	41		2F8H	000FFEF8H	
System reserved	66	42		2F4H	000FFEF4H	
System reserved	67	43		2F0H	000FFEF0H	

(Continued)

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