AlOA2
AlOA2 Phase Lock Loop 1 (PLLI) Divider, Circuit Description
AlOA2 functions as a programmable frequency divider and a phase/frequency detector. The divider is programmed by the Al5 Controller to divide the input frequency by the PLLl divide number Nl down to 5 MHz. This is then compared with a 5 MHz reference in the phase/frequency detector. The detector output, after amplification and integration, tunes the frequency of the PLLl
The PLLl divide number Nl always falls in the range between 3.60 and 13.97. The integer part is coded in four binary bits while the fractional part (0.00 to 0.99) is coded in two
Divide by 2 @
U5 constitutes a
Input Latch @
U9 and UlO are latches which store the divider programming number. The number is clocked into the latches from the instrument bus with LCK4.
Divide by N @
U12 is a
1.On the next clock pulse, the programming number is loaded into the counter, and the cycle repeats. Loading time is sensed by U14B when the count is at 2. The next clock pulse causes U14B to change states which enables the loading of U12 on the subsequent clock pulse.
Fractional Divide 6J
The fractional divide works on the
Therefore, the divide ratio is the number of input pulses divided by the number of output pulses which is equal to N •l- A/P. In this case P is 100, so N represents the integer portion of the divide number while A represents the fractional part times 100.
An example best illustrates how the fractional divide works. If the PLL2 divide number Nl is 8.57, then N=8 and A=57. The integer divider normally divides by N each divide cycle.
AlOA2 1