IBM 770 manual Microprocessor, Cache Memory Operation, System Board, Description

Description

This section describes the microprocessor, connectors, memory subsystems, and miscellaneous system functions and ports for the ThinkPad computers.

Microprocessor

The ThinkPad 770 uses the Intel Pentium200or 233 MHz processor with the MMXtechnology.

The Processor has a 32-bit address bus and a 64-bit data bus. It is software-compatible with all previous microprocessors. The

Processor has an internal, split data and instruction, 32KB write-back cache. It includes pipelined math coprocessor functions and superscalar architecture (two execution units).

Cache Memory Operation

In addition to the 32 KB of internal Level 1 (L1) cache memory in the microprocessor, the system board of the ThinkPad 770 computer

contains an additional 256 KB of external Level 2 (L2) cache memory.

The

cache

memory in the Intel Pentium microprocessor and the L2

external cache memory enable the microprocessor to read

instructions

and data much faster than

if the microprocessor had to

access system memory. When an

instruction is first used or data is

first

read

or

written,

it

is

transferred to the cache memory from main

memory.

This

enables future accesses to the instructions or data to

occur

much

faster.

The

cache

is

disabled

and

empty

when

the

microprocessor

comes

out of the reset state. The

cache is

tested

and

enabled

during

the

power-on self-test (POST).

The

cache

memory

in

the

Intel

Pentium

microprocessor

is

loaded

from

system

memory in 32-byte

increments, each referred to as a

cache line. A cache line is aligned on a paragraph boundary. A

reference

to any byte contained in a

cache line

results

in

the

entire

line

being

read

into

the

cache

memory

(if

the

data

was

not already in

the cache). When the microprocessor gives

up

control

of

the

system

bus,

the cache

memory

enters

“snoop”

mode

and

monitors

all

write

2-2

System Board