Product Overview

ICP-PIII

 

 

1.4Hardware

1.41Block Diagram

Figure 1.41 Block Diagram

 

 

 

x86 Ôprocessor

 

 

 

 

 

 

Pentium III,

 

 

 

VGA

 

Silicon Motion

 

Celeron

 

 

 

 

 

 

 

 

 

 

Lynx3DM

 

 

 

 

 

GigaST)R

 

 

Socket

 

 

 

 

or

 

 

 

 

PanelLink

 

AGP

FC-PGA 370

 

 

 

 

ATI Radeon VE

 

 

 

TFT

 

 

or

 

 

 

 

Graphics

 

 

 

SDRAM (ECC)

 

 

 

BGA2 (Mobile)

 

 

 

 

 

 

 

 

 

 

8/16 MByte

 

 

 

 

128 MByte

 

 

SGRAM

 

 

 

 

 

 

 

 

 

 

On-Board

 

 

 

 

 

 

 

10/100 Mbit/s

Intel 82559 Ethernet

North Bridge

 

128/384 MByte

Ethernet

 

 

 

 

 

 

 

Intel 82443BX

PC100

Piggyback

 

 

 

Extension

10/100 Mbit/s

Intel 82559 Ethernet

 

 

 

 

 

Ethernet

 

 

 

 

 

 

 

 

 

 

 

PCI/PCI Bridge

 

 

 

 

 

 

 

400 Mbit/s

PL

TSB 12LV23

 

PCI Bus

 

 

System Slot

FireWire

 

 

 

 

or

 

 

 

 

 

 

 

 

 

 

 

 

 

Peripheral Device

2x USB

 

 

USB

South

IRQ

 

 

Mouse/Key.

 

 

PS/2

Bridge

FDC

 

Floppy

COM1/2

 

 

COM 1/2

ALi 1543C

EIDE

 

Hard-Disk

LPT1

 

 

LPT 1

PCI2ISA

Power

 

(2 Channels. 4 Devices)

 

 

 

 

 

 

 

 

 

 

 

Piggyback

 

 

RTC

 

ISA Bus

 

 

Up to 512 MByte

 

 

 

 

 

 

M-Systems

 

 

 

 

 

 

 

 

 

 

 

FLASH (BIOS)

 

 

Disk-On-Chipª

This block diagram is applicable to all Inova’s PIII-based CPUs. Components and/or functionality may change without notice. An extra PCI load can be attached to the on-board 80-pin header. An open specification is available allowing developers to manufacture their own PCI device.

Page1-10

©2002 Inova Computers GmbH

Doc. PD00581013.004

Page 20
Image 20
Inova ICP-PII user manual Hardware, Block Diagram