80C186EA/80C188EA, 80L186EA/80L188EA

DERATING CURVES

272432 – 13

Figure 13. Typical Output Delay Variations

Versus Load Capacitance

RESET

The processor performs a reset operation any time the RESIN pin is active. The RESIN pin is actually synchronized before it is presented internally, which means that the clock must be operating before a reset can take effect. From a power-on state, RESIN must be held active (low) in order to guarantee cor- rect initialization of the processor. Failure to pro- vide RESIN while the device is powering up will result in unspecified operation of the device.

Figure 15 shows the correct reset sequence when first applying power to the processor. An external clock connected to CLKIN must not exceed the VCC threshold being applied to the processor. This is nor- mally not a problem if the clock driver is supplied with the same VCC that supplies the processor.

When attaching a crystal to the device, RESIN must remain active until both VCC and CLKOUT are stable (the length of time is application specific and de- pends on the startup characteristics of the crystal circuit). The RESIN pin is designed to operate cor- rectly using an RC reset circuit, but the designer

272432 – 14

Figure 14. Typical Rise and Fall Variations

Versus Load Capacitance

must ensure that the ramp time for VCC is not so long that RESIN is never really sampled at a logic low level when VCC reaches minimum operating conditions.

Figure 16 shows the timing sequence when RESIN is applied after VCC is stable and the device has been operating. Note that a reset will terminate all activity and return the processor to a known operat- ing state. Any bus operation that is in progress at the time RESIN is asserted will terminate immediately (note that most control signals will be driven to their inactive state first before floating).

While RESIN is active, signals RD/QSMD, UCS, LCS, MCS0/PEREQ, MCS1/ERROR, LOCK, and TEST/BUSY are configured as inputs and weakly held high by internal pullup transistors. Forcing UCS and LCS low selects ONCE Mode. Forcing QSMD low selects Queue Status Mode. Forcing TEST/ BUSY high at reset and low four clocks later enables Numerics Mode. Forcing LOCK low is prohibited and results in unspecified operation.

33

33

Page 32 Page 34
Page 33
Image 33
Intel 80L188EA, 80L186EA, 80C188EA, 80C186EA specifications Derating Curves, Reset
Page 32 Page 34

80L186EA, 80L188EA, 80C186EA, 80C188EA specifications

The Intel 80C188EA, 80C186EA, 80L188EA, and 80L186EA microprocessors represent significant developments in the realm of embedded computing during the 1980s. These processors are part of Intel's x86 architecture, designed to cater to a variety of industrial applications, including automotive and telecommunications.

The 80C188EA and 80C186EA are CMOS variants that offer enhanced power efficiency and reduced heat generation compared to their NMOS predecessors. Operating at clock speeds of up to 25 MHz, these processors are known for their performance in real-time applications. The 80C188EA features a 16-bit data bus and a 16-bit address bus, which can support up to 1 MB of addressable memory. It also boasts an extended instruction set for greater computing flexibility, making it suitable for intricate tasks in embedded systems.

Similarly, the 80C186EA is characterized by its 16-bit architecture, but it includes additional on-chip memory management capabilities. This processor can handle 256 KB of memory directly and supports paged memory management, facilitating efficient multitasking and resource sharing in complex applications. Its integrated DMA controller and interrupt controller allow for superior handling of peripheral devices, making it ideal for real-time processing requirements.

On the other hand, the 80L188EA and 80L186EA are low-power variants optimized for battery-operated designs. These microprocessors are tailored for applications where power consumption is critical. The 80L188EA retains the essential features of the 80C188EA but operates at lower voltage levels, thus allowing for longer operational life in portable devices. The 80L186EA similarly benefits from reduced power consumption, taking advantage of its energy-efficient design to enhance durability in industrial automation scenarios.

All four processors leverage Intel's established x86 architecture, enabling a wide range of software compatibility. Their built-in support for real-time interrupt handling and I/O operations provides developers with valuable tools for building reliable embedded systems. Additionally, they feature on-chip oscillators and timers, further streamlining design requirements and reducing the need for external components.

Overall, the Intel 80C188EA, 80C186EA, 80L188EA, and 80L186EA processors are ideal for diverse applications in embedded systems. Their blend of processing power, energy efficiency, and versatility continues to influence the design of modern electronic devices, underscoring Intel's pivotal role in advancing microprocessor technology.
Top Page Image Contents