Intel 80L186EA, 80L188EA, 80C188EA ICC Versus Frequency and Voltage, Pdtmr PIN Delay Calculation

80C186EA/80C188EA, 80L186EA/80L188EA

ICC VERSUS FREQUENCY AND VOLTAGE

The current (ICC) consumption of the processor is essentially composed of two components; IPD and ICCS.

IPD is the quiescent current that represents internal device leakage, and is measured with all inputs or floating outputs at GND or VCC (no clock applied to the device). IPD is equal to the Powerdown current and is typically less than 50 mA.

ICCS is the switching current used to charge and discharge parasitic device capacitance when chang- ing logic levels. Since ICCS is typically much greater than IPD, IPD can often be ignored when calculating ICC.

ICCS is related to the voltage and frequency at which the device is operating. It is given by the formula:

Power e V c I e V2 c CDEV c f

... I e ICC e ICCS e V c CDEV c f

PDTMR PIN DELAY CALCULATION

The PDTMR pin provides a delay between the as- sertion of NMI and the enabling of the internal clocks when exiting Powerdown. A delay is required only when using the on-chip oscillator to allow the crystal or resonator circuit time to stabilize.

NOTE:

The PDTMR pin function does not apply when RESIN is asserted (i.e., a device reset during Pow- erdown is similar to a cold reset and RESIN must remain active until after the oscillator has stabi- lized).

To calculate the value of capacitor required to pro- vide a desired delay, use the equation:

440 c t e CPD (5V, 25§C) Where: t e desired delay in seconds

CPD e capacitive load on PDTMR in mi- crofarads

Where: V e Device operating voltage (VCC)				EXAMPLE: To get a delay of 300 ms, a capacitor
CDEV e Device capacitance				value of C	PD	e 440 c	(300 c 10b6) e 0.132 mF is
f e Device operating frequency				required. Round up to standard (available) capaci-
				tive values.
ICCS e ICC e Device current
						NOTE:
Measuring CDEV on a device like the 80C186EA				The above equation applies to delay times greater
would be difficult. Instead, CDEV is calculated using				than 10 ms and will compute the TYPICAL capaci-
the above formula by measuring ICC at a known VCC				tance needed to achieve the desired delay. A delay
and frequency (see Table 11). Using this CDEV val-				variance of a50% or b25% can occur due to
ue, ICC can be calculated at any voltage and fre-				temperature, voltage, and device process ex-
quency within the specified operating range.				tremes. In general, higher VCC and/or lower tem-
EXAMPLE: Calculate the typical ICC when operating				perature will decrease delay time, while lower VCC
				and/or higher temperature will increase delay time.
at 20 MHz, 4.8V.
ICC e ICCS e 4.8 c 0.515 c 20 & 49 mA
		Table 11. CDEV Values
	Parameter		Typ	Max		Units		Notes
	CDEV (Device in Reset)		0.515	0.905	mA/V*MHz			1, 2
	CDEV (Device in Idle)		0.391	0.635	mA/V*MHz			1, 2

1.Max CDEV is calculated at b40§C, all floating outputs driven to VCC or GND, and all outputs loaded to 50 pF (including CLKOUT and OSCOUT).

2.Typical CDEV is calculated at 25§C with all outputs loaded to 50 pF except CLKOUT and OSCOUT, which are not loaded.

24

24