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Intel AI5VG IDE Primary/Secondary Master/Slave UDMA, Onboard FDD Controller, UART 2 Mode

Models: AI5VG

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IDE Primary/Secondary Master/Slave UDMA

Chapter 7 LANDesk User Guide

The system supports five modes, numbered from 0 (default) to 4, which primarily differ in timing. When Auto is selected, the BIOS will select the best available mode.

IDE Primary/Secondary Master/Slave UDMA

This field allows your system to improve disk I/O throughput to 33Mb/sec with the Ultra DMA/33 feature. The options are Auto and Disabled.

Onboard FDD Controller

This option allows you to select the onboard FDD port.

Onboard Serial/Parallel Port

These fields allow you to select the onboard serial and parallel ports and their addresses. The default value for these ports are:

Serial Port 1	3F8/IRQ4
Serial Port 2	2F8/IRQ3
Parallel Port	378H/IRQ7

UART 2 Mode

This field determines the UART 2 mode in your computer. The options are Standard, HPSIR, and ASKIR.

Onboard Parallel Mode

This field allows you to determine parallel port mode function.

SPP	Normal Printer Port
EPP	Enhanced Parallel Port
ECP	Extended Capabilities Port

50	AI5VG Pentium VP3 Baby AT Motherboard User’s Manual

Image 54

Intel AI5VG IDE Primary/Secondary Master/Slave UDMA, Onboard FDD Controller, Onboard Serial/Parallel Port, UART 2 Mode

Contents

AI5VG User’s ManualPentium VP3 Baby AT Motherboard Page Contents Chapter 4 Hardware SettingsChapter 6 BIOS Configuration •Introduction •Specifications ChecklistChapter 1 Introduction •Hardware Description •Hardware SettingsL2 Cache Chapter 2 SpecificationsMain Processor Main MemoryOnboard Bus Mastering EIDE BIOSCPU Temperature Sensor Windows 95 Shut-DownChapter 3 Hardware Description Figure 1: Layout of the AI5VG Motherboard Chapter 3 Hardware Description3.3 Main Memory 3.1 Processor and CPU Voltage3.2 L2 Cache Memory Chapter 3 Hardware DescriptionTotal Memory Bank0Bank1 SIMM1, SIMM2Bank1 DIMM1 3.4 BIOSBank0 DIMM2 Total Memory3.6 Onboard Multi-I/O 3.7 Onboard CPU Temperature Sensor3.5 Onboard PCI EIDE 3. Power ManagementAddress 3.8 I/O Port Address Map3.9 DMA Channels Device DescriptionLevel 3.10 Interrupt Request Lines IRQ3.11 Accelerated Graphics Port AGP Slot FunctionChapter 4 Hardware Settings Figure 2: Jumper Locations of the AI5VG Chapter 4 Hardware SettingsCPU FREQ Bus ClockMutiplier P55C = Pentium with MMX technologyCPU FREQ Bus ClockMutiplier Bus ClockIntel P55C, Cyrix 6x86L/MX, AMD K6 4.2 SW21-4:CPU Voltage SelectorFor Dual Voltage CPU Bus Clock3.3V 4.3 JP5: Clear CMOS Selection FunctionFunction Chapter 5 Installation Figure 3: Connector Location on the AI5VG Chapter 5 Installation5.2 J3: AT Power Supply Connector 5.1 I/O ConnectorsFigure 4: Orientation of the I/O Connector Wire ColorSignal Name 5.3 J2: ATX Power Supply Connector5.4 J1, J4: AT Keyboard and PS/2 Mouse Connectors Signal NameSignal Name 5.6 J8: Floppy Drive Connector5.5 J7, J6: Serial Ports Signal NameSignal Name 5.7 J9, J11: EIDE ConnectorsJ9: Primary IDE Connector Signal Name5.10 J5: USB Connector 5.8 J10: Parallel Port Connector5.9 J15: IrDA Connector Signal Name5.13 J20 Front Bezel Connector 5.11 J13 Wake on LAN Connector5.12 J14: CPU Fan Power Connector Pin # Signal NamePower LED and Keylock: Pins 11 - Speaker: Pins 1 -Signal Name Signal NameReset Switch: Pins 9 and Signal NameJ20 Pin # Chapter 6 BIOS Configuration Cache Rd+CPU Wt Pipeline IDE Primary/Secondary Master/Slave PIO 6.1 BIOS Introduction 6.2 BIOS SetupPress <DEL> to Enter Setup STANDARD CMOS SETUP Chapter 7 LANDesk User Guide6.3 Standard CMOS Setup DatePrimary HDDs / Secondary HDDs MODE for IDE HDD only : AutoTime CYLSVideo Floppy 3 Mode SupportDrive A / Drive B Halt On6.4 BIOS Features Setup Virus WarningCPU Internal Cache / External Cache Boot Up Floppy Seek Quick Power On Self TestBoot Sequence Boot Up NumLock StatusVideo BIOS Shadow Typematic Rate SettingTypematic Delay Msec Typematic Rate Chars/SecDRAM Read Pipeline 6.5 Chipset Features SetupBank DRAM Timing Sustained 3T WriteCache Timing Video BIOS CacheableSystem BIOS Cacheable Memory Hole at 15MB Addr6.6 Power Management Setup Power ManagementSuspend Mode HDD Power DownDoze Mode PM Control by APMPM Events Chapter 7 LANDesk User GuideReset Configuration Data 6.7 PNP/PCI ConfigurationPNP OS Installed Resources Controlled byCPU to PCI Write Buffer PCI Delay TransactionPCI#2 Access #1 Retry PCI Dynamic BurstingPCI IDE IRQ Map To Chapter 7 LANDesk User Guide6.8 Load BIOS Defaults 6.9 Load Setup DefaultsChapter 7 LANDesk User Guide IDE HDD Block Mode 6.10 Integrated PeripheralsIDE Prefetch Mode OnChip Primary/Secondary PCI IDEIDE Primary/Secondary Master/Slave UDMA UART 2 ModeOnboard Parallel Mode Onboard FDD Controller6.11 Supervisor / User Password Chapter 7 LANDesk User Guide6.12 IDE HDD Auto Detection 6.13 HDD Low Level FormatChapter 7 LANDesk User Guide 6.14 Save & Exit Setup 6.15 Exit Without SavingChapter 7 LANDesk User Guide