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Intel AI5VG Specifications, Main Processor, L2 Cache, Main Memory, Memory Type, Chipset

Models: AI5VG

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Chapter 2 Specifications

Chapter 2 Specifications

Chapter 2 Specifications

Based on VIA’s VP3AT chipset, the AI5VG is a Baby AT Pentium motherboard that supports all the features to make a Microsoft PC’97 compliant PCI/ISA system. This high performance model comes with an Accelerated Graphics Port (AGP) slot, power management functionality that is compliant with ACPI (Advanced Configuration and Power Interface) and legacy APM requirements. In addition to standard PIO and DMA mode operation, the AI5VG features Ultra DMA/33 for improved disk I/O throughput. The main features of this motherboard are listed as follows:

Main Processor

Intel Pentium 90/100/120/133/150/166/200

Intel Pentium MMX (P55C) 90/100/120/133/150/166/200/233 Cyrix 6x86/6x86L P150+/P166+/P200+

Cyrix 6x86MX PR166/PR200/PR233/PR266 AMD K5 PR100/PR133/PR166

AMD K6 166/200/233

L2 Cache

512KB Pipelined Burst Synchronous SRAM onboard

Main Memory

Four 72-pin SIMM sockets and two 168-pin DIMM sockets

Memory Type

SIMMs: FPM (Fast Page Mode) or EDO (Extended Data Out) SIMM Size: 4MB 8MB 16MB 32MB 64MB

DIMMs: EDO DRAM or SDRAM (Synchronous DRAM) DIMM Size: 8MB 16MB 32MB 64MB 128MB

Chipset

VIA’s VP3AT chipset with built-in PCI EIDE

Onboard I/O

Winbond W83877 for two serial, one parallel, one floppy drive interface and IrDA support

2	AI5VG Pentium VP3 Baby AT Motherboard User’s Manual

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Intel AI5VG user manual Specifications, Main Processor, L2 Cache, Main Memory, Memory Type, Chipset, Onboard I/O

Contents

AI5VG User’s ManualPentium VP3 Baby AT Motherboard Page Contents Chapter 4 Hardware SettingsChapter 6 BIOS Configuration •Introduction •Specifications ChecklistChapter 1 Introduction •Hardware Description •Hardware SettingsL2 Cache Chapter 2 SpecificationsMain Processor Main MemoryOnboard Bus Mastering EIDE BIOSCPU Temperature Sensor Windows 95 Shut-DownChapter 3 Hardware Description Figure 1: Layout of the AI5VG Motherboard Chapter 3 Hardware Description3.3 Main Memory 3.1 Processor and CPU Voltage3.2 L2 Cache Memory Chapter 3 Hardware DescriptionTotal Memory Bank0Bank1 SIMM1, SIMM2Bank1 DIMM1 3.4 BIOSBank0 DIMM2 Total Memory3.6 Onboard Multi-I/O 3.7 Onboard CPU Temperature Sensor3.5 Onboard PCI EIDE 3. Power ManagementAddress 3.8 I/O Port Address Map3.9 DMA Channels Device DescriptionLevel 3.10 Interrupt Request Lines IRQ3.11 Accelerated Graphics Port AGP Slot FunctionChapter 4 Hardware Settings Figure 2: Jumper Locations of the AI5VG Chapter 4 Hardware SettingsCPU FREQ Bus ClockMutiplier P55C = Pentium with MMX technologyCPU FREQ Bus ClockMutiplier Bus ClockIntel P55C, Cyrix 6x86L/MX, AMD K6 4.2 SW21-4:CPU Voltage SelectorFor Dual Voltage CPU Bus Clock3.3V 4.3 JP5: Clear CMOS Selection FunctionFunction Chapter 5 Installation Figure 3: Connector Location on the AI5VG Chapter 5 Installation5.2 J3: AT Power Supply Connector 5.1 I/O ConnectorsFigure 4: Orientation of the I/O Connector Wire ColorSignal Name 5.3 J2: ATX Power Supply Connector5.4 J1, J4: AT Keyboard and PS/2 Mouse Connectors Signal NameSignal Name 5.6 J8: Floppy Drive Connector5.5 J7, J6: Serial Ports Signal NameSignal Name 5.7 J9, J11: EIDE ConnectorsJ9: Primary IDE Connector Signal Name5.10 J5: USB Connector 5.8 J10: Parallel Port Connector5.9 J15: IrDA Connector Signal Name5.13 J20 Front Bezel Connector 5.11 J13 Wake on LAN Connector5.12 J14: CPU Fan Power Connector Pin # Signal NamePower LED and Keylock: Pins 11 - Speaker: Pins 1 -Signal Name Signal NameReset Switch: Pins 9 and Signal NameJ20 Pin # Chapter 6 BIOS Configuration Cache Rd+CPU Wt Pipeline IDE Primary/Secondary Master/Slave PIO 6.1 BIOS Introduction 6.2 BIOS SetupPress <DEL> to Enter Setup STANDARD CMOS SETUP Chapter 7 LANDesk User Guide6.3 Standard CMOS Setup DatePrimary HDDs / Secondary HDDs MODE for IDE HDD only : AutoTime CYLSVideo Floppy 3 Mode SupportDrive A / Drive B Halt On6.4 BIOS Features Setup Virus WarningCPU Internal Cache / External Cache Boot Up Floppy Seek Quick Power On Self TestBoot Sequence Boot Up NumLock StatusVideo BIOS Shadow Typematic Rate SettingTypematic Delay Msec Typematic Rate Chars/SecDRAM Read Pipeline 6.5 Chipset Features SetupBank DRAM Timing Sustained 3T WriteCache Timing Video BIOS CacheableSystem BIOS Cacheable Memory Hole at 15MB Addr6.6 Power Management Setup Power ManagementSuspend Mode HDD Power DownDoze Mode PM Control by APMPM Events Chapter 7 LANDesk User GuideReset Configuration Data 6.7 PNP/PCI ConfigurationPNP OS Installed Resources Controlled byCPU to PCI Write Buffer PCI Delay TransactionPCI#2 Access #1 Retry PCI Dynamic BurstingPCI IDE IRQ Map To Chapter 7 LANDesk User Guide6.8 Load BIOS Defaults 6.9 Load Setup DefaultsChapter 7 LANDesk User Guide IDE HDD Block Mode 6.10 Integrated PeripheralsIDE Prefetch Mode OnChip Primary/Secondary PCI IDEIDE Primary/Secondary Master/Slave UDMA UART 2 ModeOnboard Parallel Mode Onboard FDD Controller6.11 Supervisor / User Password Chapter 7 LANDesk User Guide6.12 IDE HDD Auto Detection 6.13 HDD Low Level FormatChapter 7 LANDesk User Guide 6.14 Save & Exit Setup 6.15 Exit Without SavingChapter 7 LANDesk User Guide