Intel® Compute Module MFS2600KI TPSTable of Contents
1.
1
1.1
Chapter Outline ......................................................................................................
2.
2
2.1
Intel® Compute Module MFS2600KI Feature Set....................................................
2.2
Compute Module Layout ........................................................................................
3
2.2.1
Connector and Component Locations ....................................................................
2.2.2
External I/O Connector Locations...........................................................................
4
3.
5
3.1
Intel® Xeon® processor ...........................................................................................
3.1.1
Processor Support .................................................................................................
3.1.2
Processor Initialization Error Summary...................................................................
7
3.2
Processor Functions Overview ...............................................................................
9
3.2.1
Intel® QuickPath Interconnect...............................................................................
10
3.2.2
Intel® Hyper-Threading Technology......................................................................
3.3
Processor Integrated I/O Module (IIO)..................................................................
3.3.1
PCI Express Interfaces.........................................................................................
3.3.2
DMI2 Interface to the PCH ...................................................................................
11
3.3.3
Integrated IOAPIC................................................................................................
3.3.4
Intel® QuickData Technology................................................................................
3.4
Memory Subsystem..............................................................................................
3.4.1
Integrated Memory Controller (IMC) and Memory Subsystem ..............................
3.4.2
Publishing Compute Module Memory ...................................................................
15
3.4.3
Memory Map and Population Rules......................................................................
3.4.4
Memory RAS........................................................................................................
19
3.5
Intel® C602-J Chipset Overvew ............................................................................
20
3.5.1
Digital Media Interface (DMI)................................................................................
21
3.5.2
PCI Express* Interface .........................................................................................
3.5.3
Serial ATA (SATA) Controller ...............................................................................
3.5.4
Low Pin Count (LPC) Interface.............................................................................
3.5.5
Serial Peripheral Interface (SPI) ...........................................................................
3.5.6
Advanced Programmable Interrupt Controller (APIC) ...........................................
3.5.7
Universal Serial Bus (USB) Controllers ................................................................
22
3.6
Integrated Baseboard Management Controller Overview .....................................
3.6.1
Super I/O Controller .............................................................................................
3.6.2
Graphics Controller and Video Support ................................................................
23
3.6.3
Baseboard Management Controller......................................................................
24
3.7
Network Interface Controller (NIC) .......................................................................
25
3.8
Intel® Virtualization Technology for Directed I/O (Intel® VT-d) ...............................
26
Revision 1.0
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Intel order number: G51989-002