Intel MFS2600KIB 61

Appendix C: POST Error Code		Intel® Compute Module MFS2600KI TPS

Error Code	Error Message		Response
85D0	DIMM_K3 disabled		Major

85D1	DIMM_L1 disabled		Major

85D2	DIMM_L2 disabled		Major

85D3	DIMM_L3 disabled		Major

85D4	DIMM_M1 disabled		Major

85D5	DIMM_M2 disabled		Major

85D6	DIMM_M3 disabled		Major

85D7	DIMM_N1 disabled		Major

85D8	DIMM_N2 disabled		Major

85D9	DIMM_N3 disabled		Major

85DA	DIMM_O1 disabled		Major

85DB	DIMM_O2 disabled		Major

85DC	DIMM_O3 disabled		Major

85DD	DIMM_P1 disabled		Major

85DE	DIMM_P2 disabled		Major

85DF	DIMM_P3 disabled		Major

85E0	DIMM_K3 encountered a Serial Presence Detection (SPD) failure		Major

85E1	DIMM_L1 encountered a Serial Presence Detection (SPD) failure		Major

85E2	DIMM_L2 encountered a Serial Presence Detection (SPD) failure		Major

85E3	DIMM_L3 encountered a Serial Presence Detection (SPD) failure		Major

85E4	DIMM_M1 encountered a Serial Presence Detection (SPD) failure		Major

85E5	DIMM_M2 encountered a Serial Presence Detection (SPD) failure		Major

85E6	DIMM_M3 encountered a Serial Presence Detection (SPD) failure		Major

85E7	DIMM_N1 encountered a Serial Presence Detection (SPD) failure		Major

85E8	DIMM_N2 encountered a Serial Presence Detection (SPD) failure		Major

85E9	DIMM_N3 encountered a Serial Presence Detection (SPD) failure		Major

85EA	DIMM_O1 encountered a Serial Presence Detection (SPD) failure		Major

85EB	DIMM_O2 encountered a Serial Presence Detection (SPD) failure		Major

85EC	DIMM_O3 encountered a Serial Presence Detection (SPD) failure		Major

85ED	DIMM_P1 encountered a Serial Presence Detection (SPD) failure		Major

85EE	DIMM_P2 encountered a Serial Presence Detection (SPD) failure		Major

85EF	DIMM_P3 encountered a Serial Presence Detection (SPD) failure		Major

8604	POST Reclaim of non-critical NVRAM variables		Minor

8605	BIOS Settings are corrupted		Major

92A3	Serial port component was not detected		Major
	Serial port component was not detected		Major

92A9	Serial port component encountered a resource conflict error		Major

A000	TPM device not detected.		Minor

A001	TPM device missing or not responding.		Minor

A002	TPM device failure.		Minor

A003	TPM device failed self-test.		Minor

A100	BIOS ACM Error		Major

A421	PCI component encountered a SERR error		Fatal

A5A0	PCI Express component encountered a PERR error		Minor

A5A1	PCI Express component encountered an SERR error		Fatal

54	Intel Confidential	Revision 1.0
	Intel order number: G51989-002

Contents

Revision June Enterprise Platforms and Services Division Revision History Disclaimers Table of Contents Introduction Product Overview Functional Architecture Page List of Figures List of Tables < This page intentionally left blank 1.Introduction 1.1Chapter Outline 2.Product Overview 2.1Intel® Compute Module MFS2600KI Feature Set 2.2Compute Module Layout 2.2.1Connector and Component Locations 2.2.3External I/O Connector Locations 3.Functional Architecture 3.1Intel® Xeon® processor 3.1.1Processor Support 3.1.1.1Processor Socket Assembly 3.1.1.2Processor Population Rules Note: 3.1.2Processor Initialization Error Summary Table 2. Mixed Processor Configurations 3.2Processor Functions Overview 3.2.1Intel® QuickPath Interconnect 3.2.2Intel® Hyper-ThreadingTechnology 3.3Processor Integrated I/O Module (IIO) 3.3.1PCI Express Interfaces 3.3.2DMI2 Interface to the PCH 3.3.3Integrated IOAPIC 3.3.4Intel® QuickData Technology 3.4Memory Subsystem 3.4.1Integrated Memory Controller (IMC) and Memory Subsystem 3.4.1.1Intel® Compute Module MFS2600KI Supported Memory Table 4. UDIMM Support Guidelines (Preliminary. Subject to Change) Table 5. RDIMM Support Guidelines (Preliminary. Subject to Change) Table 6. LRDIMM Support Guidelines (Preliminary. Subject to Change) 3.4.2Publishing Compute Module Memory 3.4.3Memory Map and Population Rules Page Page 3.4.3.1Memory Subsystem Nomenclature 3.4.4Memory RAS 3.5Intel® C602-JChipset Overvew 3.5.1Digital Media Interface (DMI) 3.5.2PCI Express* Interface 3.5.3Serial ATA (SATA) Controller 3.5.4Low Pin Count (LPC) Interface 3.5.5Serial Peripheral Interface (SPI) 3.6Integrated Baseboard Management Controller Overview 3.6.1Super I/O Controller 3.6.2Graphics Controller and Video Support 3.6.3Baseboard Management Controller 3.7Network Interface Controller (NIC) 3.8Intel® Virtualization Technology for Directed I/O (Intel® VT-d) 4.System Security 4.1BIOS Password Protection 4.2Trusted Platform Module (TPM) Support 4.2.1TPM security BIOS 4.2.2Physical Presence 4.2.3TPM Security Setup Options 4.3Intel® Trusted Execution Technology 5.Connector/Header Locations and Pin-outs 5.1Board Connector Information 5.2Power Connectors 5.3I/O Connector Pin-outDefinition 5.3.1VGA Connector 5.3.2I/O Mezzanine Card Connector Table 18. 120-pinI/O Mezzanine Card Connector Pin-out Table 19. 120-pinI/O Mezzanine Card Connector Signal Definitions Page 5.3.3Midplane Signal Connector 5.3.4Serial Port Connector 5.3.5USB 2.0 Connectors 5.3.6Low Profile eUSB SSD Support 6.Jumper Block Settings 6.1CMOS Clear and Password Clear Usage Procedure 6.2Integrated BMC Force Update Procedure 6.3Integrated BMC Initialization 6.4ME Force Update Jumper 6.5BIOS Recovery Jumper 7.Product Regulatory Requirements 7.1Product Regulatory Requirements 7.2Product Regulatory Compliance and Safety Markings 7.3Product Environmental/Ecology Requirements Appendix A: Integration and Usage Tips Appendix B: POST Code Diagnostic LED Decoder Table 27. POST Progress Codes POST Memory Initialization MRC Diagnostic Codes Page Page Appendix C: POST Error Code Page Page Page Page POST Error Beep Code Appendix D: Supported Intel® Modular Server System Glossary Glossary Page Reference Documents