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Operation
3.3.9 (c) Frame Data Valid
Differential line-driven signal with EIA-644 format. It is active high during the transfer of each frame data. During integration, both LDV and FDV are kept high and restart upon the completion of integration.
3.3.9 (d) Pixel Clock
Differential line-driven signal with EIA-644 format. The master clock frequency is 50.98MHz (or 40.068MHz).
TM-6710/6710CL High-Speed Progressive Scanning CCD Camera
