Channelized OC12 IQ PIC

Software features

Cables and connectors

LEDs

Alarms, errors, and events

Instrumentation (counters)

Quality of service (QoS) per channel: weighted round-robin (WRR), random early detection (RED), weighted random early detection (WRED)

Simple Network Management Protocol (SNMP): OC3 MIB, DS3 MIB, T1 MIB

Dynamic, arbitrary channel configuration

Full bit error rate test (BERT)

Encapsulations:

High-Level Data Link Control (HDLC)

Frame Relay

Circuit cross-connect (CCC)

Translational cross-connect (TCC)

Point-to-Point Protocol (PPP)

Duplex SC/PC connector (Rx and Tx); single-mode fiber

Optical interface support—See Table 13 on page 41

One tricolor per port:

Off—Not enabled

Green—Online with no alarms or failures

Amber—Online with alarms for remote failures

Red—Active with a local alarm; router has detected a failure

Alarm indication signal (AIS-L, AIS-P)

Bit error rate signal degrade (BERR-SD), bit error rate signal fail (BERR-SF)

Bit interleaved parity errors B1, B2, B3 (CV-S, CV-L, CV-P)

Errored seconds (ES-S, ES-L, ES-P), far-end bit errors REI-L, REI-P (CV-LFE, CV-PFE), far-end block error (FEBE), far-end errored seconds (ES-LFE, ES-PFE), far-end severely errored seconds (SES-LFE, SES-PFE), far-end unavailable seconds (UAS-LFE, UAS-PFE)

Frame error

Idle code, Idle received

Loss of frame (LOF), loss of pointer (LOP-P), loss of signal (LOS)

Out of frame (OOF)

Payload mismatch (PLM-P), payload unequipped (UNEQ-P)

Parity bit (P-bit) disagreements

Path parity error

Remote defect indication (RDI-L, RDI-P)

Severely errored framing (SEF), severely errored framing seconds (SEFS-S), severely errored seconds (SES-S, SES-L, SES-P), unavailable seconds (UAS-L, UAS-P)

Yellow alarm bit (X-bit) disagreements

Layer 2 per-queue and per-channel packet and byte counters

Table 13: Optical Interface Support for Channelized OC12 IQ PICs

Parameter

Intermediate Reach (IR)

Optical interface

Single-mode

Channelized OC12 IQ PIC 41

Page 41
Image 41
Juniper Networks M120 manual Optical Interface Support for Channelized OC12 IQ PICs