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Chapter 10 Clock Synchronous Serial Interface
10
Fig. 10-30 Sending Data from the Slave Device to the Master Device
Program processing
Hardware operation
Program processing
SCK pin 12345678 12
SB0 pin BUSY READY D7
Hardware operation
D6 D5 D4 D3 D2 D1 D0 ACK BUSY D7 D6
READY
Data
Master device processing (receiver)
Transfer line
Slave device processing (transmitter)
Read SIO
Read
SIO
Set
ACKT Receive data processing
Stop
SCK Serial reception
Generate
INTCSI
Output
ACK Serial reception
Write
to SIO
Write
to SIO
Clear
BUSY Serial transmission
Generate
INTCSI
Set
ACKD
Output
BUSY
Clear
BUSY
3
D5
Remark This timing is valid only under the following conditions:
The master is only allowed to receive data.
ACKE is set to 0.
The slave is only allowed to transmit data.
BSYE is set to 1.