316
µ
PD78214 Sub-Series
Fig. 12-12 Example of Handling Interrupts That Occur Simultaneously
12.3.5 Interrupt Request and Macro Service Pending
When any of the following instructions is executed, all interrupts (including nonmaskable interrupts) and macro
services are kept pending. The pending state continues until another instruction is executed. Software interrupt
requests are not kept pending, however.
EI
DI
RETI
RETB
POP PSW
MOV PSW,A
MOV PSW,#byte
IST, MK0, IF0, PR0, and ISM0 manipulation instructions
PSW bit manipulation instructions (excluding BT PSW.bit, $addr16, BF PSW.bit, $addr16, SET1 CY, NOT1 CY, and
CLR1 CY instructions)
Cautions 1. When a BF instruction is used to poll registers related to interrupts, do not specify this BF instruction as the branch destination.
Otherwise, all interrupts and macro services are kept pending until a condition that inhibits a branch is met during execution
of the instruction.
Example of incorrect coding
LOOP: BF IF0H.3, $LOOP
× × ×
Example of correct coding (1)
LOOP: NOP
BF IF0H.3, $LOOP
Main routine
Processing b
[Nesting 1] [Nesting 2]
Processing d Processing c
Processing a
• Vectored interrupt request a (low priority)
• Macro service request b (high priority)
• Macro service request c (low priority)
• Vectored interrupt request d (high priority)
Default priority: a > b > c > d
All interrupts and macro services are kept pending, until
IF0H.3 is set to 1. The pending state continues until the
instruction next to the BF is executed.
Interrupts or macro services will not be kept pending long,
because they are processed after the NOP is executed.