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3.2.18 VDD....................................................................................................................................... 70
3.2.19 VSS ....................................................................................................................................... 70
3.2.20 VPP (PROM versions only)................................................................................................... 70
3.2.21 IC (Mask ROM version only)................................................................................................70
3.3 Input/output Circuits and Recommended Connection of Unused Pins ...................... 71
CHAPTER 4 PIN FUNCTION ( µ PD78054Y Subseries).................................................................. 75
4.1 Pin Function List ............................................................................................................... 75
4.1.1 Normal operating mode pins ............................................................................................... 75
4.1.2 PROM programming mode pins (PROM versions only)...................................................... 79
4.2 Description of Pin Functions ........................................................................................... 80
4.2.1 P00 to P07 (Port 0).............................................................................................................. 80
4.2.2 P10 to P17 (Port 1).............................................................................................................. 81
4.2.3 P20 to P27 (Port 2).............................................................................................................. 81
4.2.4 P30 to P37 (Port 3).............................................................................................................. 82
4.2.5 P40 to P47 (Port 4).............................................................................................................. 82
4.2.6 P50 to P57 (Port 5).............................................................................................................. 83
4.2.7 P60 to P67 (Port 6).............................................................................................................. 83
4.2.8 P70 to P72 (Port 7).............................................................................................................. 84
4.2.9 P120 to P127 (Port 12)........................................................................................................ 84
4.2.10 P130 and P131 (Port 13)..................................................................................................... 85
4.2.11 AVREF0.................................................................................................................................. 85
4.2.12 AVREF1.................................................................................................................................. 85
4.2.13 AVDD..................................................................................................................................... 85
4.2.14 AVSS..................................................................................................................................... 85
4.2.15 RESET................................................................................................................................. 85
4.2.16 X1 and X2............................................................................................................................ 86
4.2.17 XT1 and XT2 ....................................................................................................................... 86
4.2.18 VDD....................................................................................................................................... 86
4.2.19 VSS ....................................................................................................................................... 86
4.2.20 VPP (PROM versions only)................................................................................................... 86
4.2.21 IC (Mask ROM version only)................................................................................................86
4.3 Input/output Circuits and Recommended Connection of Unused Pins ...................... 87
CHAPTER 5 CPU ARCHITECTURE................................................................................................ 91
5.1 Memory Spaces ................................................................................................................. 91
5.1.1 Internal program memory space.......................................................................................... 99
5.1.2 Internal data memory space................................................................................................ 100
5.1.3 Special Function Register (SFR) area................................................................................. 100
5.1.4 External memory space....................................................................................................... 100
5.1.5 Data memory addressing .................................................................................................... 101
5.2 Processor Registers ......................................................................................................... 109
5.2.1 Control registers .................................................................................................................. 109
5.2.2 General registers................................................................................................................. 112
5.2.3 Special Function Register (SFR)......................................................................................... 114
5.3 Instruction Address Addressing ..................................................................................... 118
5.3.1 Relative addressing ............................................................................................................. 118
5.3.2 Immediate addressing ......................................................................................................... 119