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CHAPTER 21 INTERRUPT AND TEST FUNCTIONS
<7>
PPR6
Symbol
PR0L
<6>
PPR5
<5>
PPR4
<4>
PPR3
<3>
PPR2
<2>
PPR1
<1>
PPR0
<0>
TMPR4
Address
FFE8H FFH
After
Reset R/W
R/W
0
1
Priority Level Selection
High priority level
Low priority level
<7>
TMPR01
PR0H
<6>
TMPR00
<5>
TMPR3
<4>
STPR
<3>
SRPR
<2>
SERPR
<1>
CSIPR1
<0>
CSIPR0
7
1PR1L
6
1
5
1
4
1
3
1
<2>
ADPR
<1>
TMPR2
<0>
TMPR1
FFE9H FFH R/W
FFEAH FFH R/W
× ×
PR
×
Cautions 1. If a watchdog timer is used in watchdog timer mode 1, set TMPR4 flag to 1.2. Set always 1 in PR1L bits 3 through 7.(3) Priority specify flag registers (PR0L, PR0H, and PR1L)The priority specify flag is used to set the corresponding maskable interrupt priority orders.PR0L, PR0H, and PR1L are set with a 1-bit or 8-bit memory manipulation instruction. If PR0L and PR0H areused as a 16-bit register PR0, use a 16-bit memory manipulation instruction for the setting.RESET input sets these registers to FFH.Figure 21-4. Priority Specify Flag Register Format