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CHAPTER 17 SERIAL INTERFACE CHANNEL 0 (
µ
PD78054Y Subseries)
Example of program releasing serial transfer status
SET1 P2.5; <1>
SET1 PM2.5; <2>
SET1 PM2.7; <3>
CLR1 CSIE0; <4>
SET1 CSIE0; <5>
SET1 RELT; <6>
CLR1 PM2.7; <7>
CLR1 P2.5; <8>
CLR1 PM2.5; <9>
<1> This instruction prevents the SDA0 pin from outputting a low level when the I2C bus mode is restored
by instruction <5>. The output of the SDA0 pin goes into a high-impedance state.
<2> This instruction sets the P25 (/SDA0) pin in the input mode to protect the SDA0 line from adverse
influence when the port mode is set by instruction <4>. The P25 pin is set in the input mode when
instruction <2> is executed.
<3> This instruction sets the P27 (/SCL) pin in the input mode to protect the SCL line from adverse influence
when the port mode is set by instruction <4>. The P27 pin is set in the input mode when instruction
<3> is executed.
<4> This instruction changes the mode from I2C bus mode to port mode.
<5> This instruction restores the I2C bus mode from the port mode.
<6> This instruction prevents the SDA0 pin from outputting a low level when instruction <8> is executed.
<7> This instruction sets the P27 pin in the output mode because the P27 pin must be in the output mode
in the I2C bus mode.
<8> This instruction clears the output latch of the P25 pin to 0 because the output latch of the P25 pin
must be set to 0 in the I2C bus mode.
<9> This instruction sets the P25 pin in the output mode because the P25 pin must be in the output mode
in the I2C bus mode.
Remark RELT: Bit 0 of serial bus interface control register (SBIC)