231
CHAPTER 9 8-BIT TIMER/EVENT COUNTERS 1 AND 2
(2) External event counter operation
The external event counter counts the number of external clock pulses to be input to the TI1/P33 and TI2/
P34 pins with 8-bit timer registers 1 and 2 (TM1 and TM2).
TM1 and TM2 are incremented each time the valid edge specified with the timer clock select register (TCL1)
is input. Either the rising or falling edge can be selected.
When the TM1 and TM2 counted values match the values of 8-bit compare registers (CR10 and CR20), TM1
and TM2 are cleared to 0 and the interrupt request signals (INTTM1 and INTTM2) are generated.
Figure 9-9. External Event Counter Operation Timings (with Rising Edge Specified)
Remark N = 00H to FFH
TI1 Pin Input
TM1 Count Value
INTTM1
CR10
00 01 02 03 04 05 N-1 N 00 01 02 03
N