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CHAPTER 16 SERIAL INTERFACE CHANNEL 0 (
ยต
PD78054 Subseries)
Figure 16-24. ACKD Operations(a) When ACK signal is output at 9th clock of SCK0(b) When ACK signal is output after 9th clock of SCK0(c) Clear timing when transfer start is instructed in BUSYFigure 16-25. BSYE Operation
SCK0
SB0 (SB1)
ACKD
789
D1 D0 ACK
6
D2
Transfer Start
Instruction
SIO0
Transfer Start
SB0 (SB1)
ACKD
ACK
9
SIO0
78
D1
6
D2 D0
Transfer Start
Instruction
Transfer Start
SCK0
SCK0
SB0 (SB1)
ACKD
ACK
9
Transfer Start
Instruction
SIO0
78
D1
6
D2 D0 D6D7BUSY
SCK0
SB0 (SB1)
BSYE
789
ACK
6
When BSYE = 1 at this point
BUSY
If reset during this period and
BSYE = 0 at the falling edge of SCK0
D2 D1 D0