15
Sleep Controller
The Pico E-15 contains one Cypress PSoC which is used to generate a clock for the bootloader and control the power state.
The E-15 can be placed in a state where it draws almost no power, then wakes up automatically after a set amount of time.
The sleep controller can be activated by the FPGA, or the external peripheral interface connector.
The protocol for entering sleep state is simple. Simply pulse FPGA_POWERCTL_C for as many seconds as your wish to sleep, then lower the FPGA_POWERCTL_D signal.
The Pico E-15 will awake from sleep if any of the following conditions are true: -Power is first applied
-The sleep timer has run out
-POWERCTL_D is low and POWERCTL_C is high
The Pico E-15 will enter sleep mode if any of the following conditions are true: -An overtemperature condition is detected
-The FPGA_POWERCTL_D pin is low -The POWERCTL_C pin is low
Pico E-15 Hardware Reference | www.picocomputing.com | Pico Computing |
| (206) 283-2178 | 150 Nickerson Street. Suite 311 |
| | Seattle, WA 98109 |
