Silicon Image SSD-P08G(I)-3521 manual Csel, Inpack

ELECTRICAL SPECIFICATION			SSD-PXXX(I)-3521 DATA SHEET
		Table 8: Signal Descriptions (Continued)
	Signal Name	Pin	Type Description

-CE1, -CE2

(PC Card I/O mode)

Card Enable

This signal is the same as the PC Card Memory Mode signal. See "I/O Space Read Operations" on page 42 and "I/O Space Write Operations" on page 42.

-CS0, -CS1 (True IDE mode)

In the true IDE mode, -CS0 is the chip select for the task file registers while -CS1 is used to select the Alternate Status register and the Device Control register.

-CSEL	39	I	This signal is not used for this mode.
(PC Card memory
mode)
-CSEL			This signal is not used for this mode.
(PC Card I/O
mode)
-CSEL			This internally pulled-up signal is used
(True IDE mode)			to configure this device as a master or
			slave when configured in the true IDE
			mode.
			When this pin is:
			• Grounded, this device is configured
			as a master.
			• Open, this device is configured as
			a slave.
-INPACK	43	O	This signal is not used in this mode.
(PC Card memory
mode)
-INPACK			This signal is asserted by the
(PC Card I/O			SiliconDrive CF when the card is
mode)			selected and responding to an I/O
Input Acknowledge			read cycle at the address that is on
			the address bus. This signal is used

by the host to control the enabling of any input data buffers between the SiliconDrive CF and the CPU.

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3521P-02DSR PAGE 9 FEBRUARY 2, 2009