Silicon Image SSD-P08G(I)-3521 manual Ata Sel, Rdy/-Bsy, Ireq

ELECTRICAL SPECIFICATION				SSD-PXXX(I)-3521 DATA SHEET
	Table 8: Signal Descriptions (Continued)
	Signal Name	Pin	Type	Description
	-ATA SEL			To enable true IDE mode, this input
	(True IDE mode)			should be grounded by the host.
	-RDY/-BSY	37	O	In memory mode, this signal is:
	(PC Card memory			• Set high when the SiliconDrive CF
	mode)			is ready to accept a new data
				transfer operation.
				• Held low when the card is busy.
				The host memory card socket must
				provide a pull-up resistor.
				At power-up and reset, the RDY/-BSY
				signal is held low (busy) until the
				SiliconDrive CF has completed its
				power-up or reset function. No access
				of any type should be made to the
				SiliconDrive CF during this time. The
				RDY/-BSY signal is held high
				(disabled from being busy) whenever
				the SiliconDrive CF has been
				powered up with +RESET
				continuously disconnected or
				asserted.
	-IREQ			I/O Operation. After the SiliconDrive
	(PC Card I/O			CF has been configured for I/O
	mode)			operation, this signal is used as
	Input Acknowledge			-Interrupt Request. This line is strobed
				low to generate a pulse mode
				interrupt or held low for a level mode
				interrupt.
	-IREQ			In true IDE mode, this signal is the
	(True IDE mode)			active high Interrupt Request to the
				host.

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3521P-02DSR PAGE 12 FEBRUARY 2, 2009