ATA REGISTERS

SSD-PXXX(I)-3521 DATA SHEET

DEVICE CONTROL REGISTER

The Device Control register is used to control the interrupt request and issue ATA software resets.

Table 44: Device Control Register

Operation

D7

D6

D5

D4

D3

D2

D1

D0

Write

-

-

-

-

1

SRST

nIEN

0

 

 

 

 

 

 

 

 

 

Bit(s) Description

7-4 Reserved bits.

3 Always set to 1.

2 Software Reset (SRST). When set, resets the ATA software.

1Interrupt Enable (nIEN). When set, device interrupts are disabled. There is no function in the memory-mapped mode.

0 Always set to 0.

SILICONSYSTEMS PROPRIETARY

This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.

All unauthorized use and/or reproduction is prohibited.

3521P-02DSR

PAGE 57

FEBRUARY 2, 2009

Page 67
Image 67
Silicon Image SSD-P08G(I)-3521 manual Device Control Register, Srst, Nien