Manuals / Silicon Image / Computer Equipment / Network Card

Silicon Image SSD-P08G(I)-3521 manual Cylinder Low Register

Models: SSD-P08G(I)-3521

1 109

Download 109 pages 28.88 Kb

Page 61

Image 61

ATA REGISTERS

SSD-PXXX(I)-3521 DATA SHEET

CYLINDER LOW REGISTER

The Cylinder Low register is set by the host to specify the cylinder number low byte. Following an ATA command, the content of the register is written by the device, identifying the cylinder number low byte.

In LBA mode, the 8-bit register maintains the contents of the Logical Block number address bits A15:A08.

Table 38: Cylinder Low Register

Operation	D7	D6	D5	D4	D3	D2	D1	D0
Read/Write		Cylinder	Number	Low	Byte (CHS Addressing)

	Logical Block Number bits A15-A08 (LBA Addressing)

Default Value	0	0	0	0	0	0	0	0

SILICONSYSTEMS PROPRIETARY

This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.

All unauthorized use and/or reproduction is prohibited.

3521P-02DSR

PAGE 51

FEBRUARY 2, 2009

Page 61

Image 61

Silicon Image SSD-P08G(I)-3521 manual Cylinder Low Register, Logical Block Number bits A15-A08 LBA Addressing

Contents

Overview FeaturesRevision History UpdatedDocument No Release Date Changes AddedTable of Contents Common Memory Description and Operation Attribute Memory Description and OperationSpace Description and Operation ATA and True IDE Register DecodingATA Command Set Related Documentation Sales and Support Part NumberingList of Figures List of Tables SSD-PXXXI-3521 Data Sheet Set Multiple Mode C6h Set Sleep Mode 99h, E6h Physical Dimensions Physical SpecificationsSystem Power Requirements Product SpecificationsSystem Performance Reliability SiliconDrive Part# Capacity Service Life GB Written per DayOperational Life Span Environmental Specifications Product Capacity SpecificationsProduct Capacity Number Bytes Sectors Cylinders Heads Track Pin Assignments Electrical SpecificationIOIS16# IOCS16# GND Signal Name Pin Type Description Signal DescriptionsDasp SpkrInpack CselDmarq True IDE modeGND GroundIord This signal is not used in this mode PC Card memory ModeIowr RDY/-BSY ATA SELIreq +5V, +3.3V power PC Card memory Mode ResetREG DmackVoltage Sense Signals This signal is the same for all modes PC Card I/O ModeWait IordyIOIS16 Symbol Parameter Minimum Maximum UnitsAbsolute Maximum Ratings DC Characteristics Symbol Parameter Maximum UnitsSymbol Parameter V ±10% 5V ±10% Units Minimum Maximum CapacitanceAttribute and Common Memory Read Timing Attribute and Common Memory Read TimingAttribute and Common Memory Write Timing Attribute and Common Memory Write TimingO Access Read Timing Access Read TimingO Access Write Timing Access Write TimingTrue IDE Read/Write Access Timing True IDE Read/Write Access TimingTrue IDE Multiword DMA Read/Write Access Timing True IDE Multiword DMA Read/Write Access TimingAttribute Memory Description and Operation D158 D70 ModeAttribute Memory Read Operations Function REG# CE1# CE2#Attribute Memory Write Operations Register Operation Addr CE1# Attribute Memory MapCard Information Structure Attribute Data Description of Contents CIS Function OffsetCistplfunce Tpcemi Tpcefs Tpceio Exponent Nominal voltage = VCC nominal value A6h 1Eh IRQ Configuration table entry tuple Tuple code E4h 12h Exponent Nominal voltage = VCC nominal value F0h 4Dh SSD-PXXXI-3521 Data Sheet Card Information Structure Sreset Configuration Option Register 200hBits Description Read Changed SigChg IOis8 PwrDn Int Write Default Value Configuration and Status Register 202hCrdy Pin Placement Register 204hRrdy Socket and Copy Register 206h Copy Number Socket Number Default ValueRead/Write RFUCommon Memory Read Operations Common Memory Description and OperationCommon Memory Write Operations Space Description and Operation Function Mode REG# CE1# CE2# A0 IORD# IOWR# D158 D70O Space Read Operations O Space Write OperationsMemory-Mapped Register Decoding ATA and True IDE Register DecodingReg# Offset A10 A9A4 OE# = L WE# = L Independent I/O Mode Register Decoding Reg# A10 A9A4 Primary and Secondary I/O Mapped Register DecodingPrimary Secondary CS0# CS1# DA02 DA01 DA00 Task File Register SpecificationTrack 0 Not Found TKONF. Set when the execute drive Error RegisterATA Registers Media Changed MC. Set toOperation Feature RegisterRead/Write ByteSector Count Register Read/Write Sector Count Default ValueLogical Block Number bits A07-A00 LBA Addressing Sector Number RegisterLogical Block Number bits A15-A08 LBA Addressing Cylinder Low RegisterLogical Block Number bits A23-A16 LBA Addressing Cylinder High RegisterHS3 HS2 HS1 HS0 Drive/Head RegisterLBA27 LBA26 LBA25 LBA24 Status Register Drive Write Fault DWF. Always set toBSY Drdy DRQ Corr IDX ERROperation Read/Write ATA Command Code Command RegisterAlternate Status Register Srst Device Control RegisterNIEN Device Address Register Read/Write NWTG NHS3 NHS2 NHS1 NHS0 NDS1 NDS0 Default ValueATA Command Block and Set Description ATA Command Block and SET DescriptionATA Command Set Class Command Name Registers Used CodeATA Command Set Check Power Mode 98h, E5h Check Power Mode 98h, E5hRegister Executive Drive Diagnostic 90h Executive Drive Diagnostic 90hFormat Track 50h Drive Head Number LBA27-24 Command 50hFormat Track 50h Identify Drive ECh Identify Drive EChIdentify Drive Drive Attribute Data Word Data Default Bytes Data Description AddressIdentify Drive Drive Attribute Data Identify Drive Drive Attribute Data Idle 97h, E3h Idle 97h, E3hIdle Immediate 95h, E1h Idle Immediate 95h, E1hInitialize Drive Parameters 91h Initialize Drive Parameters 91hRecalibrate 1Xh Drive Command 1XhRecalibrate 1Xh Read Buffer E4h Read Buffer E4hRead DMA C8h Drive Head Number LBA27-24 Command C8hRead DMA C8h LBARead Multiple C4h Drive Head Number LBA27-24 Command C4hRead Multiple C4h Read Sector 20h, 21h Drive Head Number LBA27-24 Command 20h or 21hRead Sector 20h, 21h Read Long Sectors 22h, 23h Drive Head Number LBA27-24 Command 22h or 23hRead Long Sectors 22h, 23h Read Verify Sectors 40h, 41h Drive Head Number LBA27-24 Command 40h or 41hRead Verify Sectors 40h, 41h Seek 7Xh Drive Head Number LBA27-24 Command 7XhSeek 7Xh Set Features EFh Set Features EFhSet Features’ Attributes Feature OperationSet Multiple Mode C6h Set Multiple Mode C6hSet Sleep Mode 99h, E6h Set Sleep Mode 99h, E6hStandby 96h, E2h Standby 96h, E2hStandby Immediate 94h, E0h Standby Immediate 94h, E0hWrite Buffer E8h Write Buffer E8hWrite DMA CAh Drive Head NumberLBA27-24 Command CAhWrite DMA CAh Write Multiple C5h Drive Head NumberLBA27-24 Command C5hWrite Multiple C5h Write Sectors 30h, 31h Drive Head Number LBA27-24 Command 30h or 31hWrite Sectors 30h, 31h Write Long Sectors 32h, 33h Drive Head Number LBA27-24 Command 32h or 33hWrite Long Sectors 32h, 33h Erase Sectors C0h Drive Head Number LBA27-24 Command C0hErase Sectors C0h Extended Error Codes Description Extended Error CodesRequest Sense 03h Request Sense 03hTranslate Sector 87h Drive Head Number LBA27-24 Command 87hTranslate Sector 87h Wear-Level F5h Wear-Level F5hWrite Multiple w/o Erase CDh Drive Head Number LBA27-24 Command CDhWrite Multiple w/o Erase CDh Write Sectors w/o Erase 38h Drive Head Number LBA27-24 Command 38hWrite Sectors w/o Erase 38h Write Verify 3Ch Drive Head Number LBA27-24 Command 3ChWrite Verify 3Ch Part Numbering Sales and SupportPart Numbering Nomenclature 3521Part Number Capacity Part NumbersSample Label Front Label Standard Back Label with Lot Code InformationRelated Documentation Related Documentation

SSD-PXXX(I)-3521 DATA SHEET

Table 38: Cylinder Low Register

Read/Write

Logical Block Number bits A15-A08 (LBA Addressing)

SILICONSYSTEMS PROPRIETARY