Silicon Image SSD-P08G(I)-3521 manual ATA and True IDE Register Decoding

ATA AND TRUE IDE REGISTER DECODING SSD-PXXX(I)-3521 DATA SHEET

ATA AND TRUE IDE REGISTER DECODING

SiliconDrive can be configured as either a a memory-mapped or an an I/O devices. As noted earlier, communication to and from the drive is accomplished using the ATA Command Block.

MEMORY-MAPPED REGISTER DECODING

In memory-mapped mode, the SiliconDrive registers are accessed via standard memory references (i.e., OE# and WE#). The ATA registers are mapped to common memory space in a 2KB window starting at address 0.

Table 30: Memory-Mapped Register Decoding

Reg#	Offset	A10	A9:A4	A3	A2	A1	A0	OE# = L	WE# = L
1	0	0	X	0	0	0	0	Even Data	Even Data
								Read	Write
1	1	0	X	0	0	0	1	Error	Feature
1	2	0	X	0	0	1	0	Sector Count	Sector Count
1	3	0	X	0	0	1	1	Sector	Sector
								Number	Number
1	4	0	X	0	1	0	0	Cylinder Low	Cylinder Low
1	5	0	X	0	1	0	1	Cylinder High	Cylinder High
1	6	0	X	0	1	1	0	Drive/Head	Drive/Head
1	7	0	X	0	1	1	1	Status	Command
1	8	0	X	1	0	0	0	Duplicate	Duplicate
								Even Data	Even Data
								Read	Write
1	9	0	X	1	0	0	1	Duplicate Odd	Duplicate Odd
								Data Read	Data Write
1	D	0	X	1	1	0	1	Duplicate	Duplicate
								Error	Feature
1	E	0	X	1	1	1	0	Alternate	Device Control
								Status
1	F	0	X	1	1	1	1	Drive Address	Reserved
1	X	1	X	X	X	X	0	Even Data	Even Data
								Read	Write
1	X	1	X	X	X	X	1	Odd Data	Odd Data
								Read	Write

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3521P-02DSR PAGE 43 FEBRUARY 2, 2009