
| COMMON MEMORY DESCRIPTION AND OPERATION | 
 | 
COMMON MEMORY DESCRIPTION AND OPERATION
Common memory space can be accessed when the SiliconDrive is configured in 
COMMON MEMORY READ OPERATIONS
Common memory read operations are issued by asserting CE1#, CE2#, or both, and OE# low, REG#, and WE# must be inactive.
Table 26: Common Memory Read Operations
| Function Mode | REG# | CE1# | CE2# | A0 | OE# | WE# | D[15:8] | D[7:0] | 
| 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
| Standby | X | H | H | X | X | X | ||
| 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
| Byte Access | H | L | H | L | L | H | Even | |
| 
 | H | L | H | H | L | H | Odd | |
| 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
| Word Access | H | L | L | X | L | H | Odd | Even | 
| 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
| Odd Byte Only | H | H | L | X | L | H | Odd | |
| Access | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
| 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
COMMON MEMORY WRITE OPERATIONS
Common memory write operations are issued by asserting CE1#, CE2#, or both, and WE# low, REG#, and OE# must be inactive.
Table 27: Common Memory Write Operations
| Function Mode | REG# | CE1# | CE2# | A0 | OE# | WE# | D[15:8] | D[7:0] | 
| 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
| Standby | X | H | H | X | X | X | ||
| 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
| Byte Access | H | L | H | L | H | L | Even | |
| 
 | H | L | H | H | H | L | Odd | |
| 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
| Word Access | H | L | L | X | H | L | Odd | Even | 
| 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
| Odd Byte Only | H | H | L | X | H | L | Odd | |
| Access | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
| 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
 | 
SILICONSYSTEMS PROPRIETARY
This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.
All unauthorized use and/or reproduction is prohibited.
| PAGE 41 | FEBRUARY 2, 2009 | 
