HCD-C5

IC501

PD703032AYGF-M01-3BA MASTER CONTROL (UCOM BOARD)

 

 

 

 

 

Pin No.

 

Pin Name

I/O

Description

 

 

 

 

 

1

 

FL-DATA

O

FL tube data signal output

 

 

 

 

 

2

 

FL-CLK

O

FL tube clock signal output

 

 

 

 

 

3

 

SDA

I/O

IIC data signal input or output

 

 

 

 

 

4

 

FL-CE

O

FL tube enable signal output

 

 

 

 

 

5

 

SCL

I/O

IIC clock signal input or output

 

 

 

 

 

6

 

FL-RST

O

FL tube reset signal output

 

 

 

 

 

7

 

CXD-DATA

O

Data signal output to DSP

 

 

 

 

 

8

 

CXD-CLK

O

Clock signal output to DSP

 

 

 

 

 

9

 

EVDD

Power supply for I/O port

 

 

 

 

 

10

 

EVSS

Ground for I/O port

 

 

 

 

 

11

 

CXD-XLT

O

Latch signal output to DSP

 

 

 

 

 

12

 

PWM1

O

PWM1 signal output

 

 

 

 

 

13

 

LDON

O

Laser power control signal output

 

 

 

 

 

14

 

SENSE

I

CD SENSE signal input

 

 

 

 

 

15

 

SUBQ

I

CD SUBQ signal input

 

 

 

 

 

16

 

CHECK

O

Not used (open)

 

 

 

 

 

17

 

SCLK

O

CD SUBQ clock signal output

 

 

 

 

 

18

 

CTRL1

O

CTRL1 (setting double speed) signal output

 

 

 

 

 

19

 

PWM2

O

PWM2 signal output

 

 

 

 

 

20

 

PWM3

O

PWM3 signal output

 

 

 

 

 

21

 

VPP

Not used

 

 

 

 

 

22

 

SP-MUTE

O

Not used (open)

 

 

 

 

 

23

 

1-4

O

Not used (open)

 

 

 

 

 

24

 

DMUTE

O

Muting signal output to DAC

 

 

 

 

 

25

 

AMUTE

O

Not used (open)

 

 

 

 

 

26

 

LODNEG

O

Loading motor control signal output

 

 

 

 

 

27

 

LODPOS

O

Loading motor control signal output

 

 

 

 

 

28

 

BDPWR

O

CD power control signal output

 

 

 

 

 

29

 

BDRST

O

CD reset signal output

 

 

 

 

 

30

 

SW1

I

Loading switch signal input

 

 

 

 

 

31

 

SW2

I

Loading switch signal input

 

 

 

 

 

32

 

SW3(ENC-A)

I

Loading switch signal input

 

 

 

 

 

33

 

SW4(ENC-B)

I

Loading switch signal input

 

 

 

 

 

34

 

RESET

I

Systen reset input

 

 

 

 

 

35

 

XT1

I

Sub clock input

 

 

 

 

 

36

 

XT2

Sub clock output

 

 

 

 

 

37

 

REGC

Terminal for regulator clock

 

 

 

 

 

38

 

X2

Main system clock output

 

 

 

 

 

39

 

X1

I

Main system clock input

 

 

 

 

 

40

 

VSS

Ground

 

 

 

 

 

41

 

VDD

Power supply

 

 

 

 

 

42

 

CLKOUT

O

Clock output (open)

 

 

 

 

 

43

 

PLL-CLK

O

Tuner clock signal output

 

 

 

 

 

44

 

PLL-DO(COM-ST)

O

Tuner data signal output

 

 

 

 

 

45

 

PLL-DI(ST-COM)

I

Tuner data signal input

 

 

 

 

 

46

 

PLL-CE

O

Tuner chip enable signal output

 

 

 

 

 

47

 

ST-MUTE

O

Tuner muting signal output

 

 

 

 

 

48

 

STEREO

I

Stereo tuning signal input

 

 

 

 

 

49

 

TUNED

I

TUNED detect signal input

 

 

 

 

 

50

 

RDS-DATA

I

RDS data signal input

 

 

 

 

 

74

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Image 74
Sony HCD-C5 service manual IC501