Interconnection of MSP-PRGS430 to OTP/EPROM-Based
3-6
3.6 Interconnection of MSP-PRGS430 to OTP/EPROM-Based MSP430 Devices
The circuit diagram in Figure 3−4 shows the connections required to program
OTP (MSP430Pxxx) and EPROM (MSP430Exxx) based MSP430 devices
with the MSP-PRGS430 programming adapter. Consult the device data sheet
for the specific device location of the supply and JTAG pins. Ensure that all
positive and negative supply pins are connected together.

Figure 3−4. MSP−PRGS430 Used to Program OTP/EPROM-Based MSP430 Devices

VCC
10 µF
47 kΩ
JTAG
2
VCC_MSP 1TDO/TDI
43TDI/VPP
6
XOUT 5TMS
8
TEST/VPP 7TCK
10 9GND
12 11 RST
14 13
0.1 µF
68 kΩ68 kΩ
MSP430Pxxx
MSP430Exxx
RST/NMI
TDO/TDI
VCC/AVCC/DVCC
TDI/VPP
TMS
TCK
TEST/VPP
XOUT
VSS/AVSS/DVSS
The RST/NMI terminal on the MSP430 device has to be held high by an
external resistor during access of the device through JTAG. In a noisy
environment, consider using an additional capacitor from RST/NMI to VSS.
Note:
The example schematic shows a system where the target voltage is supplied
by the MSP−PRGS430. For in-system programming with an external supply
voltage, do not connect pin 2 of the JTAG connector. In this case, the supply
voltage setting in the PRGS430 must be adjusted to the external supply
voltage level. The TEST/VPP connection is only required on lower pin-count
devices with multiplexed JTAG pins.