Texas Instruments PCI445X manual System Sleeping State Consideration

System Implementation

against unexpected overwriting. The values are system and vendor dependent.

￿PC Card 16-bit I/F legacy mode base address register (PCI offset 44h: 32-bit)

Set to 0000 03E1h (16-bit mode) and set to 0000 0001 (CardBus mode) in response to a disable call.

￿Power management capabilities register (PCI offset A2h: 16-bit) If the system does not support VAUX in D3cold state, then clear bit 15.

￿Power management control/status register (PCI offset A4h: 16-bit)

Clear bit 15 by writing a 1. This should be done after all the other initialization for the PCI445X device is finished. Make sure that the PCI445X device is in the D0 state, especially after reboot.

1.4.1.2PCI TI Proprietary Registers Initialization

The registers listed below should be set up according to system requirements. Refer to Section 1.1.12.

￿System control register (PCI offset 80h: 32-bit)

￿Multimedia control register (PCI offset 84h: 8-bit)

￿GPIO3±GPIO0 control registers (PCI offset 88h ± 8Bh: 8-bit)

￿Multifunction routing register (PCI offset 8Ch: 32-bit)

￿Card control register (PCI offset 91h: 8-bit)

￿Device control register (PCI offset 92h: 8-bit)

￿Diagnostic register (PCI offset 93h: 8-bit)

￿DMA socket register 0 and 1 (PCI offset 94h, 98h: 32-bit)

￿GPE control/status register (PCI offset A8h: 16-bit)

￿ExCA identification and revision (ExCA offset 800h: 8-bit)

￿Socket power management register (CardBus socket registers offset 20h: 32-bit)

1.4.2System Sleeping State Consideration

Supporting sleeping states, such as SUSPEND, STANDBY, and HIBERNATION are important for a notebook PC environment. The following describes the sleeping state in APM systems:

1)SUSPEND

Reset signals G_RST and PRST are gated while SUSPEND is asserted. Power consumption of the PCI445X device is low if SUSPEND is asserted.

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