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Texas Instruments PCI445X Read This First, About This Manual, How to Use This Manual, Preface

Models: PCI445X

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Preface

Preface

Read This First

About This Manual

This manual is intended to assist the designer who is attempting to implement a solution using the PCI4450 or PCI4451. Much, but not all, of the information contained herein can also be found elsewhere. However, the smaller size of this manual, as well as its organization by topics of primary interest to the hardware designer, make it a much more usable source regarding those problems most likely to be encountered in the design process.

How to Use This Manual

This document contains the following chapters:

Chapter 1, PCI445X Device, provides the designer with information and examples beyond that contained in the data manuals, which will be useful for implementing solutions using the PCI4450 or PCI4451.

Appendix A, Global Reset Only Bits, PME Context Bits contains tabular listings of those register bits that can only be cleared by a global reset, and of those register bits used in conjunction with power management events.

Appendix B, PME and RI Behavior, provides truth tables that explain events and conditions which can wake up a device that has been placed in partially functional state for power conservation.

Appendix C, PCI445X Buffer Types, lists the type of signal buffering used for input and/or output on each terminal of the device.

Notational Conventions

This document uses the following conventions.

Program listings, program examples, and interactive displays are shown in a special typeface similar to a typewriter's. Examples use a bold version of the special typeface for emphasis; interactive displays use a bold version of the special typeface to distinguish commands that you

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Texas Instruments PCI445X Read This First, About This Manual, How to Use This Manual, Notational Conventions, Preface

Contents

SCPU007 PCI Bus SolutionsImplementation Guide AugustIMPORTANT NOTICE Notational Conventions How to Use This ManualRead This First About This ManualC csr ±a /user/ti/simuboard/utilities asect ªsection nameº, addressLALK 16±bit constant , shift byte value1 , ... , valuenRelated Documentation From Texas Instruments PCI4450 GFN/GJG PC Card and OHCI Controller Data Sheet, SCPS046OHCI.Lynx Configuration Information Application Report, SLLA077 TSB41LV03A Data Sheet, SLLS364Page Contents A Global Reset Only Bits, PME Context Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1 1±5 Example of a ZV Interface 1±6 Distributed DMA Signal Connection Figures1±1 Typical System Architecture 1±2 Serialized Interrupt Signal 1±3 EEPROM 2-Wire Interface 1±4 TPS22X6 Power Switch InterfaceTables Topic PCI445X DeviceChapter PageFigure 1±1. Typical System Architecture 1.1.2 GRST and PRST 1.1 System Features Selection1.1.3 PME and RI Signaling 1.1.1 Package Types1.1.8 Distributed DMA DDMA 1.1.7 Socket Power Switches1.1.9 Optional PCI Signals 1.1.6 PCI and ISA Style Interrupt1.1.12 Miscellaneous Functions Description Figure 1±2. Serialized Interrupt Signal1.1.10 Socket Activity LEDs 1.1.11 MFUNC7±MFUNC0 Terminal Assignments1.1.12.5 Memory Burst R/W Operation Control 1.1.12.4 CardBus Reserved Terminal Signaling1.1.12.6 Power Savings Mode 1.1.12.3 Asynchronous CSC Interrupt Generation1.1.12.12 ZV Port Control and Auto Detect Function 1.1.12.10 Socket Power Lock1.1.12.9 SMI 1.1.12.11VCC ProtectionPCLK, AD31±AD0, C/BE3±C/BE0, PAR, DEVSEL, FRAME, STOP 1.2 System Implementation1.2.1 Clamping Rails 1.2.2 PCI Bus InterfaceNote Pullup Resistor Requirements PRST PCI reset and GRST Global resetINTA, INTB, and INTC CLKRUN1.2.3 PC Card Interface 1.2.4 2-Wire I2C Interface for EEPROMFigure 1±3. EEPROM 2-Wire Interface Socket power supplyBits Loaded From Table 1±1. Registers and Bits Loadable Through Serial EEPROMRegister Offset RegisterFollowing is an example EEPROM data file used with the PCI445X device 1.3 Sample PCI445X EEPROM Data File1D 0xFF 1E 0xFF 1F 0xFF Figure 1±5. Example of a ZV Interface 1.3.1 P2C Interface for TPS22X6 Power SwitchFigure 1±4. TPS22X6 Power Switch Interface 1.3.2 Zoomed Video ZV InterfaceParallel PCI Interrupt 1.3.3 Interrupt Signaling Interface1.3.4 Miscellaneous Signals Serialized Interrupt InterfaceSystem Implementation Figure 1±6. Distributed DMA Signal Connection1.3.5 Requirement of Pullup/Pulldown Resistors Table 1±2. PC Card Interface Pullup Resistor List² ³Table 1±4. Miscellaneous Terminals Pullup Resistor List Table 1±3. PCI Bus Interface Pullup Resistor ListSystem Implementation Table 1±5. Required Pullup/Pulldown ResistorsSignal Pulldown DefaultCardBus latency timer register PCI offset 1Bh 8-bit 1.4 BIOS ConsiderationsCommand register PCI offset 04h 16-bit Latency timer PCI offset 0Dh 8-bit1 SUSPEND Power management control/status register PCI offset A4h 16-bit1.4.2 System Sleeping State Consideration 1.4.1.2 PCI TI Proprietary Registers Initialization1.4.3 Docking System Consideration 2 Register save/restore1.5.2 PME/RIOUT Bit Definition 1.5.4 Socket Power Control1.5 Important Information 1.5.1 GRST Clamping RailPage Appendix ATopic Global Reset Only Bits, PME Context BitsTable A±1.Global Reset Only Cleared Bits A.1 Global Reset Only Bits/PME Context BitsTable A±2.PME Context Bits Page Page PME and RI BehaviorAppendix B TopicTable B±1.CardBus CTSCHG and Wake-Up Signals Truth Table Table B±2.16-Bit Card RI/STSCHG and Wake-Up Signals Truth TableB.1 PME and RI Behavior Page PCI445X Buffer TypesAppendix C TopicPCI445X Buffer Types Table C±1. PCI445X Terminal Function Assignment and Buffer TypesPCI445X Buffer Types Terminal Signal NameSignal Name PCI445X Buffer TypesTerminal Signal NameSignal Name PCI445X Buffer TypesTerminal Signal NameSignal Name PCI445X Buffer TypesTerminal Signal NameSignal Name PCI445X Buffer TypesDescription Table C±2. Buffer Type AbbreviationsPCI445X Buffer Types Buffer Type