SCPU007
PCI Bus Solutions
Implementation Guide
August
IMPORTANT NOTICE
Notational Conventions
How to Use This Manual
Read This First
About This Manual
C csr ±a /user/ti/simuboard/utilities
asect ªsection nameº, address
LALK 16±bit constant , shift
byte value1 , ... , valuen
Related Documentation From Texas Instruments
PCI4450 GFN/GJG PC Card and OHCI Controller Data Sheet, SCPS046
OHCI.Lynx Configuration Information Application Report, SLLA077
TSB41LV03A Data Sheet, SLLS364
Page
Contents
A Global Reset Only Bits, PME Context Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1
1±5 Example of a ZV Interface 1±6 Distributed DMA Signal Connection
Figures
1±1 Typical System Architecture 1±2 Serialized Interrupt Signal
1±3 EEPROM 2-Wire Interface 1±4 TPS22X6 Power Switch Interface
Tables
Topic
PCI445X Device
Chapter
Page
Figure 1±1. Typical System Architecture
1.1.2 GRST and PRST
1.1 System Features Selection
1.1.3 PME and RI Signaling
1.1.1 Package Types
1.1.8 Distributed DMA DDMA
1.1.7 Socket Power Switches
1.1.9 Optional PCI Signals
1.1.6 PCI and ISA Style Interrupt
1.1.12 Miscellaneous Functions Description
Figure 1±2. Serialized Interrupt Signal
1.1.10 Socket Activity LEDs
1.1.11 MFUNC7±MFUNC0 Terminal Assignments
1.1.12.5 Memory Burst R/W Operation Control
1.1.12.4 CardBus Reserved Terminal Signaling
1.1.12.6 Power Savings Mode
1.1.12.3 Asynchronous CSC Interrupt Generation
1.1.12.12 ZV Port Control and Auto Detect Function
1.1.12.10 Socket Power Lock
1.1.12.9 SMI
1.1.12.11VCC Protection
PCLK, AD31±AD0, C/BE3±C/BE0, PAR, DEVSEL, FRAME, STOP
1.2 System Implementation
1.2.1 Clamping Rails
1.2.2 PCI Bus Interface
Note Pullup Resistor Requirements
PRST PCI reset and GRST Global reset
INTA, INTB, and INTC
CLKRUN
1.2.3 PC Card Interface
1.2.4 2-Wire I2C Interface for EEPROM
Figure 1±3. EEPROM 2-Wire Interface
Socket power supply
Bits Loaded From
Table 1±1. Registers and Bits Loadable Through Serial EEPROM
Register Offset
Register
Following is an example EEPROM data file used with the PCI445X device
1.3 Sample PCI445X EEPROM Data File
1D 0xFF 1E 0xFF 1F 0xFF
Figure 1±5. Example of a ZV Interface
1.3.1 P2C Interface for TPS22X6 Power Switch
Figure 1±4. TPS22X6 Power Switch Interface
1.3.2 Zoomed Video ZV Interface
Parallel PCI Interrupt
1.3.3 Interrupt Signaling Interface
1.3.4 Miscellaneous Signals
Serialized Interrupt Interface
System Implementation
Figure 1±6. Distributed DMA Signal Connection
1.3.5 Requirement of Pullup/Pulldown Resistors
Table 1±2. PC Card Interface Pullup Resistor List² ³
Table 1±4. Miscellaneous Terminals Pullup Resistor List
Table 1±3. PCI Bus Interface Pullup Resistor List
System Implementation
Table 1±5. Required Pullup/Pulldown Resistors
Signal
Pulldown Default
CardBus latency timer register PCI offset 1Bh 8-bit
1.4 BIOS Considerations
Command register PCI offset 04h 16-bit
Latency timer PCI offset 0Dh 8-bit
1 SUSPEND
Power management control/status register PCI offset A4h 16-bit
1.4.2 System Sleeping State Consideration
1.4.1.2 PCI TI Proprietary Registers Initialization
1.4.3 Docking System Consideration
2 Register save/restore
1.5.2 PME/RIOUT Bit Definition
1.5.4 Socket Power Control
1.5 Important Information
1.5.1 GRST Clamping Rail
Page
Appendix A
Topic
Global Reset Only Bits, PME Context Bits
Table A±1.Global Reset Only Cleared Bits
A.1 Global Reset Only Bits/PME Context Bits
Table A±2.PME Context Bits
Page
Page
PME and RI Behavior
Appendix B
Topic
Table B±2.16-Bit Card RI/STSCHG and Wake-Up Signals Truth Table
Table B±1.CardBus CTSCHG and Wake-Up Signals Truth Table
B.1 PME and RI Behavior
Page
PCI445X Buffer Types
Appendix C
Topic
Table C±1. PCI445X Terminal Function Assignment and Buffer Types
PCI445X Buffer Types
PCI445X Buffer Types
Terminal
Signal Name
Signal Name
PCI445X Buffer Types
Terminal
Signal Name
Signal Name
PCI445X Buffer Types
Terminal
Signal Name
Signal Name
PCI445X Buffer Types
Terminal
Signal Name
Signal Name
PCI445X Buffer Types
Description
Table C±2. Buffer Type Abbreviations
PCI445X Buffer Types
Buffer Type
