PME and RI Behavior | Texas Instruments PCI445X specs

B.1 PME and RI Behavior

Table B±1.CardBus CTSCHG and Wake-Up Signals Truth Table


RINGEN	RIMUX	RIENB	PME_EN	PME_STAT	RI_OUT/PME					MFUNC7

0	0	0	0	Latched	±±±					±±±

0	0	0	1	Latched	Latched CSTSCHG					±±±

0	0	1	0	Latched	±±±					±±±

0	0	1	1	Latched	±±±					±±±

0	1	0	0	Latched	±±±					±±±

0	1	0	1	Latched	Latched CSTSCHG					±±±

0	1	1	0	Latched	±±±					±±±

0	1	1	1	Latched	Latched CSTSCHG					±±±

1	0	0	0	Latched	±±±					±±±

1	0	0	1	Latched	Latched CSTSCHG					±±±

1	0	1	0	Latched	CSTSCHG					CSTSCHG

1	0	1	1	Latched	CSTSCHG					CSTSCHG

1	1	0	0	Latched	±±±					±±±

1	1	0	1	Latched	Latched CSTSCHG					±±±

1	1	1	0	Latched	±±±					CSTSCHG

1	1	1	1	Latched	Latched CSTSCHG					CSTSCHG

Table B±2.16-Bit Card RI/STSCHG and Wake-Up Signals Truth Table


RINGEN	RIMUX	RIENB	PME_EN	PME_STAT	RI_OUT/PME					MFUNC7

0	±±±	±±±	±±±	±±±	±±±					±±±

1	0	0	0	Latched	±±±					±±±

1	0	0	1	Latched	Latched RI					±±±

1	0	1	0	Latched	RI					RI

1	0	1	1	Latched	RI					RI

1	1	0	0	Latched	±±±					±±±

1	1	0	1	Latched	Latched RI					±±±

1	1	1	0	Latched	±±±					RI

1	1	1	1	Latched	Latched RI					RI

B-2

Image 38

Texas Instruments PCI445X manual PME and RI Behavior, Table B±1.CardBus Ctschg and Wake-Up Signals Truth Table

Contents

Implementation Guide Important Notice Read This First About This Manual Csr ±a /user/ti/simuboard/utilities Related Documentation From Texas Instruments Page Contents Viii Figures Tables PCI445X Device Topic ±1. Typical System Architecture System Features Selection PCI and ISA Style Interrupt Socket Power SwitchesOptional PCI Signals Distributed DMA Ddma Miscellaneous Functions Description Socket Activity LEDsMFUNC7±MFUNC0 Terminal Assignments Serialized Interrupt Control Asynchronous CSC Interrupt Generation CardBus Reserved Terminal SignalingPower Savings Mode Memory Burst R/W Operation Control 12.11VCC Protection Socket Power Lock12.9 SMI ZV Port Control and Auto Detect Function PCI Bus Interface System ImplementationClamping Rails PERR, SERR, and Lock Prst PCI reset and Grst Global reset INTA, INTB, and Intc PC Card Interface 4 2-Wire I2C Interface for EepromSocket power supply Damping resistor on Cclk terminal ±1. Registers and Bits Loadable Through Serial Eeprom Eeprom Sample PCI445X Eeprom Data File System Implementation 1 P2C Interface for TPS22X6 Power Switch Zoomed Video ZV Interface Interrupt Signaling Interface Miscellaneous Signals Requirement of Pullup/Pulldown Resistors ±2. PC Card Interface Pullup Resistor List² ³ ±3. PCI Bus Interface Pullup Resistor List ±4. Miscellaneous Terminals Pullup Resistor List ±5. Required Pullup/Pulldown Resistors LPS PCI Standard Registers Initialization Bios ConsiderationsInitialization System Sleeping State Consideration PCI TI Proprietary Registers Initialization Register save/restore Docking System Consideration Important Information Global Reset Only Bits, PME Context Bits Topic Global Reset Only Bits/PME Context Bits Table A±1.Global Reset Only Cleared Bits Table A±2.PME Context Bits Page PME and RI Behavior Table B±1.CardBus Ctschg and Wake-Up Signals Truth Table PME and RI Behavior PCI445X Buffer Types Signal Name Terminal Type PCI445X Buffer Types ACVS2 BCAD22 GND PHYDATA6 ZVUV4 TSO Table C±2. Buffer Type Abbreviations Buffer Type Description