Toshiba M30-35 manual Debugging port boot mode status 2/7

2 Troubleshooting Procedures 2.4 System Board Troubleshooting

	Table 2-4 Debugging port boot mode status (2/7)
Debug Port	Description
0098h	Initialize USB Controller
0101h
0102h	Verify Real Mode. If the CPU is in protected mode, turn on A20 and pulse the
	reset line, forcing a shutdown 0.
0103h	Disable Non-Maskable Interrupts.
0104h	Get CPU type from CPU registers and save it.
0106h	Initialize system hardware. Reset the DMA controllers, disable the videos, clear
	any pending interrupts from the real-time clock and set up port B register.
0107h	Disable system ROM shadow and start to execute ROM code from the flash part.
0108h	Initialize chip set registers to the initial values.
0109h	Set in-POST flag in CMOS that indicates we are in POST.
010Ah	Initialize CPU registers.
010Bh
010Ch	Initialize cache.
010Eh
010Fh
0110h
0111h	Load alternate registers with initial table values
0112h	Restore the contents of the CPU control word whenever the CPU is reset.
0113h	Reset PCI devices in early post
0114h
0116h	Verify that the ROM BIOS checksums to zero
0117h	Initialize external cache before autosizing memory.
0118h	Initialize PIT(Programmable Interval Timer).
011Ah	Initialize DMA.
011Ch	Initialize interrupt controllers for some shutdowns.
011Fh
0120h	Verify that DRAM refresh is operating by polling the refresh bit in PORTB.
0122h
0124h	Set segment-register addressibility to 4 GB
0128h	Determine DRAM size and configure the chipset accordingly. Before autosizing,
	all caches and all shadow RAM are disabled.

2-22 Satellite M30-35 Maintenance Manual (960-455)