TMP92CM22 2007-02-16 92CM22-126(6) Comparators (CP10 and CP11)
CP10 and CP11 are 16-bit comparators which compare the value in the up counter
UC10 with the value set in TB0RG0H/L or TB0RG1H/L respectively, in order to detect
a match. If a match is detected, the comparator generates an interrupt (INTTB00 or
INTTB01 respectively).
(7) Timer flip-flop (TB0FF0 and TB0FF1)
These flip-flops (TB0FF0 and TB0FF1) are inverted by the match detect signals from
the comparators and the latch signals to the capture registers. Inversion can be
enabled and disabled for each element using TB0FFCR<TB0C0T1, TB0E1T1,
TB0E0T1>.
After a reset the values of TB0FF0 and TB0FF1 are undefined. If “00” is
programmed to TB0FFCR<TB0FF0C1:0> or <TB0FF1C1:0>, TB0FF0 will be inverted.
If “01” is programmed to the capture registers, the value of TB0FF0 will be set to “1”. If
“10” is programmed to the capture registers, the value of TB0FF0 will be cleared to “0”.
The values of TB0FF0 can be output via the timer output pins TB0OUT0 (which is
shared with PC6). Timer output should be specified using the port C function register.