VT1433B User's Guide
Using the VT1433B
Synchronization in Multiple-mainframe Measurements
A TTL Trigger line between VT1433Bs making group measurements keeps all modules synchronized. This is an
One module is responsible for pulling the SYNC line low to start each group’s state transition. Then, each module holds the line low until it is ready. When all modules are ready, the SYNC line drifts high. The unidirectional line prevents modules in Mainframe B from
The lowest logical address must be in Mainframe A because of
Channel triggering must be done only by modules in Mainframe A. A trigger in any other mainframe would not be communicated back on the SYNC line to Mainframe A. The VXIplug&play Library itself selects the VT1432A with the highest channel number for synchronization.
The
Set the module as not being the Slot 0 Controller.
Set the VME timeout to 200 µs.
Set the VME BTO chain position to 1 extender,
Do not source CLK10.
Set the proper logical address.