VT1433B User's Guide

Register Definitions

Wait for Done

This is the procedure to wait for command completion and check for error.

20Wait for Command/Parameter Ready true.

21Wait for Done true.

22If Err* = 0 , handle error.

Complex Sequences

A robust procedure for sending a query and reading the response would look like this:

23Send Command.

24Wait for Done.

25If no error then Read Response.

Multiple commands may be sent with a test for errors at the end of the sequence. This example sends three commands before checking for errors.

26Send Command.

27Send Command.

28Send Command.

29Wait for Done.

DSP Protocol

When a controller writes to the Command register, a DSP interrupt is generated. When responding to this interrupt, the DSP will follow this procedure.

30Clear the Done bit.

31Read and decode the command from the Command register.

32Read any parameters from the Parameter registers and RAM.

33If a response data is required:

34Set Command/Parameter Ready true.

35Finish command execution.

36If any errors are pending set Err* = 0, else set Err* = 1.

37Set Done true.

There are two additional requirement for the DSP:

38Once it begins processing a command interrupt, the DSP must defer processing subsequent commands until it has finished.

39The DSP software maintains an error(s) pending flag (and possibly and error queue) that is set by any command decoding or execution error and cleared by some other method such as an error query.

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VXI VT1433B manual DSP Protocol

VT1433B specifications

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