Introduction | Xilinx 1.8 manual

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Chapter 1: Introduction

10	www.xilinx.com	Endpoint Block Plus v1.8 for PCI Express
		UG343 June 27, 2008

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Xilinx 1.8 manual Introduction

Contents

LogiCORE IP Endpoint Block Plus v1.8 for PCI Express UG343 June 27 Revision History Date Version Revision Table of Contents Appendix Additional Design Considerations About This Guide ContentsConventions Online Document Preface About This Guide System Requirements IntroductionAbout the Core Recommended Design Experience Feedback Additional Core ResourcesTechnical Support Core Document Feedback Introduction License Options Licensing the CoreBefore you Begin Simulation Only Obtaining Your License Installing Your License FileLicensing the Core Overview Quickstart Example DesignSimulation Design Overview 1Simulation Example Design Block Diagram Quickstart Example Design Example Design Elements Implementation Design OverviewOverview Generating the Core 3New Project Dialog Box Generating the Core 5Endpoint Block Plus Main Screen Simulating the Example Design Setting up for SimulationRunning the Simulation Windows Implementing the Example DesignImplementing the Example Design Linux Directory Structure and File Contents Project directory/component name Project directoryComponent name/doc 4Example Design Directory Name Description Component name/exampledesignComponent name/implement 5Implement Directory Name Description 6Results Directory Name Description Implement/resultsComponent name/simulation 7Simulation Directory Name Description 8dsport Directory Name Description Simulation/dsportSimulation/functional 9Functional Directory Name Description Dual Core Example Design Dual Core Example DesignSimulation/tests 10Tests Directory Name Description Dual Core Directory Structure and File Contents 12Dual Core Directory Name Description Exampledesign/dualcore11Example Design Directory Name Description 13Simulation Directory Name Description 14Functional Directory Name Description 15Implement Directory Name Description Wrapper File Usage Package ConstraintsUser Constraints Files Device/Part Number Appendix Appendix Additional Design Considerations