Xilinx 1.8 implement/results, <component name>/simulation

Endpoint Block Plus v1.8 for PCI Express www.xilinx.com 23

UG343 June 27, 2008

Directory Structure and File Contents

implement/results

The results directory is created by the implement script, after which the implement script

results are placed in the results directory.

<component name>/simulation

The simulation directory contains the simulation source files provided with the core.

Table 3-6: Results Directory

Name Description

<project_dir>/<component_name>/implement/results

Implement script result files.

Table 3-7: Simulation Directory

Name Description

<project_dir>/<component_name>/simulation

board_common.v Contains test bench definitions.

board.v[hd] Top-level simulation module.

sys_clk_gen_ds.v[hd] System differential clock source.

sys_clk_gen.v[hd] System clock source.

xilinx_pci_exp_cor_ep.f List of files comprising the design being tested.

xilinx_pci_exp_defines.v PCI Express application macro definitions.

Contents

Main Revision History Table of Contents Preface: About This Guide Chapter 1: Introduction Chapter 2: Licensing the Core Chapter 3: Quickstart Example Design Appendix: Additional Design Considerations Preface About This Guide Contents Conventions Typographical Online Document Chapter 1 Introduction About the Core System Requirements Windows Linux Additional Core Resources Technical Support Feedback Core Document Page Chapter 2 Licensing the Core Before you Begin License Options Simulation Only Full Obtaining Your License Simulation Only Evaluation License Obtaining a Full License Installing Your License File Chapter 3 Quickstart Example Design Overview Simulation Design Overview Chapter 3: Quickstart Example Design Figure 3-1: Simulation Example Design Block Diagram Implementation Design Overview Example Design Elements Generating the Core Page Simulating the Example Design Setting up for Simulation Simulator Requirements Running the Simulation For Cadence IUS Implementing the Example Design Directory Structure and File Contents Example Design <project directory> <project directory>/<component name> <component name>/doc <component name>/example_design <component name>/implement implement/results <component name>/simulation simulation/dsport simulation/functional simulation/tests Dual Core Example Design Dual Core Directory Structure and File Contents <component name>/example_design example_design/dual_core <component name>/simulation simulation/functional <component name>/implement Appendix Additional Design Considerations Package Constraints User Constraints Files Wrapper File Usage