Chapter 3: Testing Performance
To test the single-clock, multiple-edge, state acquisition
to turn off the other clocks.
dConnect the clock to be tested to the pulse generator channel 1 output.
eClick OK to close the Analyzer Setup dialog.
4Verify the test data:
a Click the Run icon.
b If you have not already done so, do “Set up the Markers:” on page 34.
c If the "can't find 4096 occurence(s)" does not appear, then the test passes.
The test passes when the logic analyzer finds all occurrences of the patterns programmed into the Markers. If the test passes, record a "Pass" in the performance test record under
5Test the next clock:
a Click the Sampling Setup icon.
b Disconnect the clock just tested from the pulse generator.
c Repeat steps 3, 4, and 5 for the next clock configuration listed in step 4 until all listed clock combinations have been tested.
6Test the next setup/hold combination: a Click the Bus/Signal Setup icon.
b Disconnect the clock just tested from the pulse generator.
c Repeat steps 1 through 6 for the next setup/hold combination listed in step 1 in page 61.
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