5.1.2Initial Power Up and Deep Sleep Exit Sequence
As shown in Figure 2, the external power management integrated circuit (PMIC) supplies both high-voltage (I/O) and low-voltage (internal) power to the PXA27x processor. The external voltage regulator also sources nBATT_FAULT and nVDD_FAULT signals to the PXA27x processor. There are two power control signals:
•SYS_EN controls the high-voltage (I/O) supplies:
—VCC_IO
—VCC_LCD
—VCC_MEM
—VCC_BB
—VCC_USB
—VCC_USIM
•PWR_EN controls low-voltage (internal) supplies:
—VCC_CORE
—VCC_PLL
—VCC_SRAM
Typically, during system assembly, the fully-charged backup battery is soldered permanently into the system. To prevent draining the backup battery prematurely, Intel recommends installing the main battery at least temporarily at this time to prevent draining the backup battery prematurely. With the backup battery in place, the PXA27x processor begins the initial cold-start, power-up sequence, enabling its power manager unit and one of the oscillators. Refer to the Intel® PXA27x Processor Family Electrical, Mechanical, and Thermal Specification for power-on-reset timing specifications.
The PXA27x processor waits for the assertion of nBATT_FAULT from the PMIC. The PXA27x processor internal power manager unit (PMU) also powers up its own section of low-power circuitry with the installation of the backup battery. Doing so allows the PMU to monitor voltages as they come up and generate the nBATT_FAULT and nVDD_FAULT signals. Because the main battery is not installed and only VCC_BATT is supplying power to the PXA27x processor, the PMIC initially must assert both nBATT_FAULT and nVDD_FAULT. (Note that the PMIC outputs must be powered from the VCC_BATT supply at this time.) The PMIC must not de-assert nBATT_FAULT until the main battery is inserted and charged.
Note: When the backup battery is installed but the main battery is not installed, the PXA27x processor draws approximately 1 mA from the backup battery on VCC_BATT. To preserve the backup battery life, Intel recommends the temporary installation of a a main battery long enough to complete an initial boot sequence and run software to configure the PXA27x processor to enter deep-sleep mode using the internal DC-to-DC converter.
The GPIO pins on the PXA27x processor initially default to inputs, so they cannot be used for power regulator control at initial power up, or for exiting deep-sleep mode unless they have been programmed to respond to an edge or level change.
