Emerson CC1000DM user manual Fuses and Jumpers

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J23:

J24:

Fuses and Jumpers

F1-F4:

Note:F5:

Fuses F5 through F10 are

located on the bottom side,		F6:
located on the bottom side,
see Fig. 2-2.		F7:
		F7:
		F8:
		F9:
		F10:
	JP1, JP2:
		JP3:
		JP5:
		JP6:
		JP7:

	S E T U P	.
	S E T U P	.
	CC1000dm Circuit Board	.
	CC1000dm Circuit Board	.
		.
		. .

This carries the 64-bit PCI extensions (secondary bus). See Table 3-10for the pin assign- ments.

This connector is for user I/O, which routes to J5. See Table 3-10for the pin assignments.

The CC1000dm has various jumpers, headers, and fuses. Please refer to Fig. 2-3on the following page for the jumper/header locations.

These are spare fuses on the top side of CC1000dm.

This fuse (.75 amp) provides protection for the 3.3 volt supply to the PMC JTAG header. This fuse (.75 amp) provides protection for the PLD JTAG header.

This fuse (.75 amp) provides protection for the 5 volt supply to the backplane. This fuse (.75 amp) provides protection for the 3.3 volt supply to the backplane. This fuse (.75 amp) provides protection for the +12 volt supply to the backplane. This fuse (.75 amp) provides protection for the -12 volt supply to the backplane. Each PMC slot has an associated 10-pin debug header (see Table 3-8).

This 10-pin jumper selects the following configurations: local VIO, Monarch, auto memory, oncard oscillator and bridge serial ROM (see page 2 -7).

This 4-pin jumper selects the mode: transparent, non-transparent, legacy (Artesyn CC1000), or no system controller (see page 2 -9).

The programmable logic device (PLD) uses this 10-pin JTAG header (see page 2-9). This is a spare header.

10004281-02

CC1000dm User’s Manual 2-5

Image 23

Contents CC1000dm Revision Level Principal Changes Date Regulatory Agency Warnings & Notices EC Declaration of Conformity Contents Bridge Eeprom PCI Bridge Features PMC Module InstallationFigures G u r e s Tables Ta b l e s Registers G i s t e r s Overview Functional Overview N. .C.T.I.O. N. .A. L. . O. .V.E. R. .V.I.E.WRoHS Compliance Type SpecificationProduct Certification Device / Interface Document Terminology and NotationTechnical References Additional InformationDocument 6CC1000dm User’s Manual 10004281-02 Width Depth SetupComponent Map, Top rev CC1000dm Circuit BoardCC1000dm Circuit Board Identification Numbers Connectors Fuses and Jumpers Jumper/Header Locations, Top View Multiple Option Selection JP3 CC1000dm SetupSignal Name Bit Selection CC1000dm SetupJumper Position ModeSel Signal NamePin Signal Bit Selection JumperTypical Current Voltage Range Amps Power RequirementsEnvironmental Considerations Operational ChecksS. E. .T. .M. E. .T.H. O. .D.S Non-transparent Reset MethodsO. U. .B. L. E. .S.H. O. .O. T. I. N. .G Troubleshooting14CC1000dm User’s Manual 10004281-02 PMC/PCI Interface Volts PMC Module InstallationDevice Mapping C / P C I I N T E R F a C EInterrupt System controller modes Base cPCI Interrupt Transparent Mode Assignment SecondaryTiming Interrupts Base PCIInternal Arbiter Control Register CC1000dm Request/Grant Local PCI Bus Device Bridge Eeprom I.D. G. .E. .E.E. P. .R.O. MPCI 6254 Configuration Registers Power Management CSR PCI 6254 Configuration Registers38h Reserved Status Vendor Device Subsystem ID hex PCI 6254 Bridge ModePCI Identification Values I. .B.U. S. . C. .O. N. .T.R. O. .L. .S.I.G. N. .A.L. S PCI Bus Control SignalsPCI Bus Control Signals Pin J11 J12 J13 J14 PMC Connector Pin AssignmentsJ23 J24 Pin J21 J22 Pin J11J13 J14 Pin J11 J12 Pin J21Pin J21 J22 J23 J24 Carrier Card BUS Interface Arbitration and Device Selection O. C. .K. .G. E. .N. E. R. .A.T. I.O. .NModel Description Hot SwapHot Swap ImplementationPin Row Z Row a Row B Row C Row D Row E Row F CC1000dm Control SignalsSignal Description Pin Row Z Row a Row B Row C Row D Row E Backplane Connector Pin AssignmentsPin Row a Row B Row C Row D Row E Row F Row FPin Row a Row B Row C Row D Row E Backplane Connector Pin Assignments 10CC1000dm User’s Manual 10004281-02 PrPMC CPCIO s s a r y Index D e Page W. a r t e s y n c p . c o m