Emerson CC1000DM user manual PCI 6254 Configuration Registers

Page 39

28h

2Ch

30h

34h

38h

3Ch

40h

44h

48h

4Ch

50h

54h

58h

64h

68h

6Ch

70h

74h

78h

9Ch

A0h

	P M C / P C I I N T E R F A C E	.
	P M C / P C I I N T E R F A C E	.
	PCI 6254 Configuration Registers	.
	PCI 6254 Configuration Registers	.
		.
		. .

Prefetchable Memory Base Upper 32 Bits

Prefetchable Memory Limit Upper 32 Bits

	I/O Limit Upper 16 Bits		I/O Base Upper 16 Bits

		reserved		ECP Pointer

		reserved
	Bridge Control		Interrupt Pin	reserved

	Arbiter Control		Diagnostic Control	Chip Control

	Miscellaneous Options		Time-out Control	Primary Flow Through
	Miscellaneous Options		Time-out Control	Control
				Control

	Secondary Incremental	Primary Incremental	Secondary Prefetch Line	Primary Prefetch Line
	Prefetch Count	Prefetch Count	Count	Count

	reserved	Secondary Flow Through	Secondary Maximum	Primary Maximum Prefetch
	reserved	Control	Prefetch Count	Count
		Control	Prefetch Count	Count

	reserved	Test Register	Internal Arbiter Control

	EEPROM Data		EEPROM Address	EEPROM Control

		reserved

	GPIO[3-0] Input Data	GPIO[3-0] Output Enable	GPIO[3-0] Output Data	P_SERR* Event Disable
	GPIO[3-0] Input Data	Control	GPIO[3-0] Output Data	P_SERR* Event Disable
		Control

	Clkrun Register	P_SERR* Status	Clock Control

	Private Memory Limit		Private Memory Base

Private Memory Base Upper 32 Bits

Private Memory Limit Upper 32 Bits

reserved

	GPIO[7-4] Input Dataport	GPIO[7-4] Output Enable	GPIO[7-4] Output Data	Hot Swap Switch ROR
	GPIO[7-4] Input Dataport	GPIO[7-4] Output Enable	GPIO[7-4] Output Data	Control
				Control

	GPIO[15-8] Input Dataport	GPIO[15-8] Output Enable	GPIO[15-8] Output Data	Power-up Status

10004281-02

CC1000dm User’s Manual 3-7

Image 39

Contents CC1000dm Revision Level Principal Changes Date Regulatory Agency Warnings & Notices EC Declaration of Conformity Contents Bridge Eeprom PCI Bridge Features PMC Module InstallationFigures G u r e s Tables Ta b l e s Registers G i s t e r s Overview Functional Overview N. .C.T.I.O. N. .A. L. . O. .V.E. R. .V.I.E.WType Specification Product CertificationRoHS Compliance Device / Interface Document Terminology and NotationTechnical References Additional InformationDocument 6CC1000dm User’s Manual 10004281-02 Width Depth SetupComponent Map, Top rev CC1000dm Circuit BoardCC1000dm Circuit Board Identification Numbers Connectors Fuses and Jumpers Jumper/Header Locations, Top View Multiple Option Selection JP3 CC1000dm SetupSignal Name Bit Selection CC1000dm SetupJumper Position ModeSel Signal NamePin Signal Bit Selection JumperTypical Current Voltage Range Amps Power RequirementsEnvironmental Considerations Operational ChecksS. E. .T. .M. E. .T.H. O. .D.S Non-transparent Reset MethodsO. U. .B. L. E. .S.H. O. .O. T. I. N. .G Troubleshooting14CC1000dm User’s Manual 10004281-02 PMC/PCI Interface Volts PMC Module InstallationDevice Mapping C / P C I I N T E R F a C EInterrupt System controller modes Base cPCI Interrupt Transparent Mode Assignment SecondaryTiming Interrupts Base PCIInternal Arbiter Control Register CC1000dm Request/Grant Local PCI Bus Device Bridge Eeprom I.D. G. .E. .E.E. P. .R.O. MPCI 6254 Configuration Registers Power Management CSR PCI 6254 Configuration Registers38h Reserved Status PCI 6254 Bridge Mode PCI Identification ValuesVendor Device Subsystem ID hex I. .B.U. S. . C. .O. N. .T.R. O. .L. .S.I.G. N. .A.L. S PCI Bus Control SignalsPCI Bus Control Signals Pin J11 J12 J13 J14 PMC Connector Pin AssignmentsJ23 J24 Pin J21 J22 Pin J11J13 J14 Pin J11 J12 Pin J21Pin J21 J22 J23 J24 Carrier Card BUS Interface Arbitration and Device Selection O. C. .K. .G. E. .N. E. R. .A.T. I.O. .NModel Description Hot SwapHot Swap ImplementationCC1000dm Control Signals Signal DescriptionPin Row Z Row a Row B Row C Row D Row E Row F Pin Row Z Row a Row B Row C Row D Row E Backplane Connector Pin AssignmentsPin Row a Row B Row C Row D Row E Row F Row FPin Row a Row B Row C Row D Row E Backplane Connector Pin Assignments 10CC1000dm User’s Manual 10004281-02 PrPMC CPCIO s s a r y Index D e Page W. a r t e s y n c p . c o m